FAN7602 Fairchild Semiconductor, FAN7602 Datasheet - Page 11

• Manufacturer Part Number: FAN7602
• Description: Green Current Mode PWM Controller
• Manufacturer: Fairchild Semiconductor

FAN7602 Rev. 1.0.2
© 2006 Fairchild Semiconductor Corporation
4. Burst Mode Block
The FAN7602 contains the burst mode block to reduce
the power loss at a light load and no load as the
FAN7601. A hysteresis comparator senses the offset
voltage of the Burst+ for the burst mode as shown in Fig-
ure 23. The Burst+ is the sum of the CS/FB voltage and
Plimit offset voltage. The FAN7602 enters the burst
mode when the offset voltage of the Burst+ is higher than
0.95V and exits the burst mode when the offset voltage
is lower than 0.88V. The offset voltage is sensed during
the switch off time.
5. Protection Block
The FAN7602 contains several protection functions to
improve system reliability.
5.1 Overload Protection
The FAN7602 contains the overload protection function.
If the output load is higher than the rated output current,
the output voltage drops and the feedback error amplifier
is saturated. The offset of the CS/FB voltage represent-
ing the feedback information is almost zero. As shown in
Figure 24, the CS/FB voltage is compared with 50mV
reference when the internal clock signal is high and, if
the voltage is lower than 50mV, the OLP timer starts
PWM+
CS/FB
GND
PWM+
CS/FB
1V
GND
1V
Figure 22. CS/FB Pin Voltage Waveforms
C irc u it
D e la y
0 .9 5 V /0 .8 8 V
Figure 23. Burst Mode Block
(a) Low Power Limit Offset Case
(b) High Power Limit Offset Case
+
−
On Time
On Time
B u rs t+
O ffs e t
F A N 7 6 0 2 R e v . 0 2
3
Power Limit
Power Limit
Offset
FAN7602 Rev. 02
Offset
C S /F B
FB
Offset
FB
Offset
11
counting. If the OLP condition persists for 22ms, the
timer generates the OLP signal. And this protection is
reset by the UVLO. The OLP block is enabled after the
soft-start finishes.
5.2 Line Under-Voltage Protection
If the input voltage of the converter is lower than the min-
imum operating voltage, the converter input current
increases too much, causing components failure. There-
fore, if the input voltage is low, the converter should be
protected. In the FAN7602, the LUVP circuit senses the
input voltage using the LUVP pin and, if this voltage is
lower than 2V, the LUVP signal is generated. The com-
parator has 0.5V hysteresis. If the LUVP signal is gener-
ated, the output drive block is shut down, the output
voltage feedback loop is saturated, and the OLP works if
the LUVP condition persists more than 22ms.
5.3 Latch Protection
The latch protection is provided to protect the system
against abnormal conditions using the Latch/Plimit pin.
The Latch/Plimit pin can be used for the output over-
voltage protection and/or other protections. If the Latch/
Plimit pin voltage is made higher than 4V by an external
circuit, the IC is shut down. The latch protection is reset
when the V
5.4 Over-Voltage Protection (OVP)
If the V
the OVP protection is reset when the V
lower than 5V.
6. Output Drive Block
The FAN7602 contains a single totem-pole output stage
to drive a power MOSFET. The drive output is capable of
up to 450mA sourcing current and 600mA sinking cur-
rent with typical rise and fall time of 45ns, 35ns respec-
tively with a 1nF load.
CC
Figure 24. Overload Protection Circuit
voltage reaches 19V, the IC shuts down and
CC
OLP
Vin
Figure 25. Line UVP Circuit
voltage is lower than 5V.
Soft-Start
Timer
1
22ms
2V/1.5V
−
+
Clock
50mV
FAN7602 Rev. 02
LUVP
FAN7602 Rev. 02
3
CC
www.fairchildsemi.com
CS/FB
voltage is