ISL95711 Intersil Corporation, ISL95711 Datasheet - Page 4

• Manufacturer Part Number: ISL95711
• Description: 128 Taps I2C Serial Interface
• Manufacturer: Intersil Corporation

Operating Specifications
EEPROM SPECS
SERIAL INTERFACE SPECS
Hysteresis
SYMBOL
(Note 13)
(Note 13)
(Note 15)
V-Ramp
I
I
LkgDig
I
t
CCSB
t
I
I
Vpor
Cpin
f
t
V
V-SB
LOW
I
I
DCP
V
CC1
CC2
V
SCL
t
BUF
t
V-1
V-2
t
AA
OL
IN
D
IH
IL
V
V- supply current, volatile write/read
V
V- supply current, nonvolatile write
V
V- current (standby)
Leakage current, at pins SDA, SCL,
A0, and A1
DCP wiper response time
Power-on recall for both V- and V
V- ramp rate
Power-up delay
EEPROM Endurance
EEPROM Retention
A0, A1, SDA, and SCL input buffer
LOW voltage
A0, A1, SDA, and SCL input buffer
HIGH voltage
SDA and SCL input buffer hysteresis
SDA output buffer LOW voltage,
sinking 4mA
A0, A1, SDA, and SCL pin capacitance
SCL frequency
Pulse width suppression time at SDA
and SCL inputs
SCL falling edge to SDA output data
valid
Time the bus must be free before the
start of a new transmission
Clock LOW time
CC
CC
CC
supply current, volatile write/read f
supply current, non volatile write
current (standby)
PARAMETER
4
Over the recommended operating conditions unless otherwise specified.
CC
Read and Volatile Write States only)
f
Read and Volatile Write States only)
f
Nonvolatile Write State only)
f
Nonvolatile Write State only)
V
V
V- = -5.5V, I
V- = -3.6V, I
Voltage at pin from GND to V
SCL falling edge of last bit of DCP Data Byte to
wiper change
V-
V
V
recall completed, and I
state
Temperature ≤ 75°C
Any pulse narrower than the max spec is
suppressed.
SCL falling edge crossing 30% of V
exits the 30% to 70% of V
SDA crossing 70% of V
condition, to SDA crossing 70% of V
the following START condition.
Measured at the 30% of V
SCL
SCL
SCL
SCL
CC
CC
CC
CC
= +5.5V, I
= +3.6V, I
above Vpor, to DCP Initial Value Register
= 400kHz;SDA = Open; (for I
= 400kHz;SDA = Open; (for I
= 400kHz; SDA = Open; (for I
= 400kHz; SDA = Open; (for I
ISL95711
2
2
C Interface in Standby State
C Interface in Standby State
TEST CONDITIONS
2
2
C Interface in Standby State
C Interface in Standby State
2
CC
C Interface in standby
CC
CC
during a STOP
CC
window.
crossing.
2
2
2
2
CC
C, Active,
C, Active,
C, Active,
C, Active,
CC
, until SDA
during
0.7*V
200,000
0.05*
1300
1300
-100
V
MIN
-2.5
-0.3
-10
0.2
50
-3
-5
-2
CC
0
CC
(Note 1)
TYP
1
3
0.3*V
V
MAX
200
200
400
900
2.5
0.3
0.4
CC
10
10
50
1
1
CC
+
August 15, 2005
UNITS
Cycles
Years
V/ms
FN8241.2
kHz
mA
µA
µA
µA
µA
µA
µA
µA
µA
ms
µs
pF
ns
ns
ns
ns
V
V
V
V
V
V