SST25VF040B SST, SST25VF040B Datasheet - Page 9
SST25VF040B
Manufacturer Part Number
SST25VF040B
Description
4 Mbit SPI Serial Flash
Manufacturer
SST
Datasheet
1.SST25VF040B.pdf
(28 pages)
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4 Mbit SPI Serial Flash
SST25VF040B
Read (25 MHz)
The Read instruction, 03H, supports up to 25 MHz Read.
The device outputs the data starting from the specified
address location. The data output stream is continuous
through all addresses until terminated by a low to high tran-
sition on CE#. The internal address pointer will automati-
cally increment until the highest memory address is
reached. Once the highest memory address is reached,
the address pointer will automatically increment to the
©2006 Silicon Storage Technology, Inc.
FIGURE 4: R
SCK
CE#
SO
SI
MODE 3
MODE 0
EAD
MSB
0 1 2 3 4 5 6 7 8
S
EQUENCE
03
HIGH IMPEDANCE
MSB
ADD.
15 16
ADD.
23 24
9
ADD.
beginning (wrap-around) of the address space. Once the
data from address location 1FFFFFH has been read, the
next output will be from address location 000000H.
The Read instruction is initiated by executing an 8-bit com-
mand, 03H, followed by address bits [A
remain active low for the duration of the Read cycle. See
Figure 4 for the Read sequence.
MSB
31 32
D
OUT
N
39 40
D
N+1
OUT
47 48
D
N+2
OUT
55 56
D
N+3
OUT
63 64
D
1295 ReadSeq.0
N+4
S71295-01-000
OUT
23
-A
70
0
]. CE# must
Data Sheet
1/06