TSS901E ATMEL Corporation, TSS901E Datasheet - Page 15

• Manufacturer Part Number: TSS901E
• Description: Tripple Point to Point IEEE1355 High Speed Controller
• Manufacturer: ATMEL Corporation

15
TSS901E
Signal Name
PLLOUT
RESET*
CLK10
TMS
TDO
VCC
GND
TCK
CLK
TDI
Type
O/Z
O
I
I
I
I
I
I
Test Clock. Provides an asynchronous clock for JTAG boundary
scan.
Test Mode Select. Used to control the test state machine.
Test Data Input. Provides serial data for the boundary scan
logic.
Test Data Output. Serial scan output of the boundary scan
path.
TSS901E Reset. Sets the TSS901E to a known state. This
input must be asserted (low) at power-up. The minimum width
of RESET low is 5 cycles of CLK10 in parallel with CLK
running.
External clock input to TSS901E (max. 25 Mhz).
Must be derived from RAM access time.
External clock input to TSS901E DS-links (application specific,
nominal 10 Mhz). Used to generate to transmission speed and
link disconnect timeout.
Output of internal PLL. Used to connect a network of external
RC devices.
Power Supply
Ground
t
CKH
Function
t
CKL
L
current [mA]
max. output
3
Rev. C – 24-Aug-01
load [pF]
50