HY29LV400 Hynix Semiconductor, HY29LV400 Datasheet

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HY29LV400

Manufacturer Part Number
HY29LV400
Description
4 Mbit (512K x 8/256K x 16) Low Voltage Flash Memory
Manufacturer
Hynix Semiconductor
Datasheet
www.DataSheet.in
KEY FEATURES
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Preliminary
Revision 1.0, November 2001
– Read, program and erase operations from
– Ideal for battery-powered applications
– 70 and 90 ns access time versions for full
– 55 ns access time version for operation
Values)
– Automatic sleep mode current: 0.2 µA
– Standby mode current: 0.2 µA
– Read current: 7 mA (at 5 Mhz)
– Program/erase current: 15 mA
– One 16 KB, two 8 KB, one 32 KB and
– One 8 KW, two 4 KW, one 16 KW and
– Top or bottom boot block configurations
– Allows locking of a sector or sectors to
– Sectors lockable in-system or via
– Temporary Sector Unprotect allows
– Sector erase time: 0.5 sec typical for each
– Chip erase time: 5 sec typical
– Byte program time: 9 µs typical
– Word program time: 11 µs typical
– Reduces programming time when issuing
and Erases Any Combination of Sectors
or the Entire Chip
Verifies Data at Specified Addresses
Single Power Supply Operation
High Performance
Ultra-low Power Consumption (Typical
Flexible Sector Architecture:
Sector Protection
Fast Program and Erase Times
Unlock Bypass Program Command
Automatic Erase Algorithm Preprograms
Automatic Program Algorithm Writes and
2.7 to 3.6 volts
voltage range operation
from 3.0 to 3.6 volts
seven 64 KB sectors in byte mode
seven 32 KW sectors in word mode
available
prevent program or erase operations
within that sector
programming equipment
changes in locked sectors (requires high
voltage on RESET# pin)
sector
multiple program command sequences
4 Mbit (512K x 8/256K x 16) Low Voltage Flash Memory
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LOGIC DIAGRAM
– Pinout and software compatible with
– Superior inadvertent write protection
– Provide software confirmation of
– Provides hardware confirmation of
– Suspends an erase operation to allow
– Erase Resume can then be invoked to
Device to Reading Array Data
– 48-pin TSOP and 48-ball FBGA packages
Minimum 100,000 Write Cycles per Sector
Compatible With JEDEC standards
Data# Polling and Toggle Bits
Ready/Busy# Pin
Erase Suspend/Erase Resume
Hardware Reset Pin (RESET#) Resets the
Space Efficient Packaging
1 8
single-power supply Flash devices
completion of program and erase
operations
completion of program and erase
operations
reading data from, or programming data
to, a sector that is not being erased
complete suspended erasure
A[17:0]
C E #
O E #
W E #
R E S E T #
B Y T E #
DQ[15]/A[-1]
DQ[14:8]
R Y / B Y #
DQ[7:0]
HY29LV400
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Related parts for HY29LV400

HY29LV400 Summary of contents

Page 1

... Erase Resume can then be invoked to complete suspended erasure n Hardware Reset Pin (RESET#) Resets the Device to Reading Array Data n Space Efficient Packaging – 48-pin TSOP and 48-ball FBGA packages LOGIC DIAGRAM 1 8 A[17: HY29LV400 8 DQ[7:0] 7 DQ[14:8] DQ[15]/A[- ...

Page 2

... HY29LV400 GENERAL DESCRIPTION The HY29LV400 Mbit, 3 volt-only, CMOS Flash memory organized as 524,288 (512K) bytes or 262,144 (256K) words that is available in 48- pin TSOP and 48-ball FBGA packages. Word- wide data (x16) appears on DQ[15:0] and byte- wide (x8) data appears on DQ[7:0]. The HY29LV400 can be programmed and erased ...

Page 3

... HY29LV400 DQ[15:0] Y-GATING ...

Page 4

... HY29LV400 PIN CONFIGURATIONS RY/BY# A15 A14 A13 A12 A11 A10 RY/BY A17 4 www.DataSheet.in 48-Ball FBGA ( mm, Top View, Balls Facing Down A[13] A[12] A[14] A[15] A[16 A[9] A[8] A[10] A[11] DQ[ ...

Page 5

... See the ‘Bus Operations’ and ‘Command Definitions’ sections of this docu- ment for additional information on these functions. In the HY29LV400, four of the sectors, which com- prise the boot block, vary in size from BUS OPERATIONS Device bus operations are initiated through the ...

Page 6

... Notes: 1. ‘X’ indicates don’t care. 2. ‘0xN N’ indicates an address in hexadecimal notation. 3. The address range in byte mode is A[17:0, -1]. The address range in word mode is A[17:0]. Table 2. HY29LV400B (Bottom Boot Block) Memory Array Organization ...

Page 7

... Notes Don’t Care ( Address is A[17:0, -1] in Byte Mode and A[17:0] in Word Mode. 3. DQ[15] is the A[-1] input in Byte Mode (BYTE# = L). Table 4. HY29LV400 Bus Operations Requiring High Voltage ...

Page 8

... HY29LV400. Standby Operation When the system is not reading or writing to the device, it can place the HY29LV400 in the Standby mode. In this mode, current consumption is greatly reduced, and the data bus outputs are placed in the high impedance state, independent of the OE# input ...

Page 9

... RESET# pin and uses standard microprocessor bus cycle timing to implement sector protection. The flow chart in Figure 1 illustrates the algorithm. The HY29LV400 is shipped with all sectors un- protected possible to determine whether a sector is protected or unprotected. See the Elec- tronic ID Mode section for details. ...

Page 10

... HY29LV400 (Note: All sectors must be protected prior to unprotecting any sector) TRYCNT = Wait 1 us Write 0x60 to device Set Address Write 0x60 to Address Wait (All protected sectors become unprotected) Perform Program or Erase ...

Page 11

... Table 5 summarizes the composition of the valid command sequences implemented in the HY29LV400, and these sequences are fully described in Table 6 and in the sections that follow. Writing incorrect address and data values or writ- ing them in the improper sequence resets the HY29LV400 to the Read mode ...

Page 12

... HY29LV400 12 www.DataSheet.in ID Electronic 6 Rev. 1.0/Nov. 01 ...

Page 13

... Reset command sequence shown in Table 6. The device then returns to the array Read mode. Chip Erase Command The Chip Erase command sequence consists of two unlock cycles, followed by a set-up command, two additional unlock cycles and then the Chip Erase command. This sequence invokes the Au- HY29LV400 13 ...

Page 14

... HY29LV400 Issue NORMAL PROGRAM Figure 4. Normal and Unlock Bypass Programming Procedures tomatic Erase algorithm that automatically preprograms and verifies the entire memory for an all zero data pattern prior to electrical erase. The host system is not required to provide any controls or timings during these operations. ...

Page 15

... Write Operation Status section Sector Erase YES Time-out (DQ[3]) Expired? YES Figure 6. Sector Erase Procedure HY29LV400 Check Erase Status DQ[5] Error Exit (See Write Operation Status Section) Normal Exit GO TO ERASE COMPLETE ERROR RECOVERY ...

Page 16

... The HY29LV400 requires a maximum of 20 µs to suspend the erase operation if the Erase Suspend command is issued during sector erasure. How- ever, if the command is written during the time- out, the time-out is terminated and the erase op- eration is suspended immediately ...

Page 17

... Data (DQ[7:0]) = 0xFF immediately after erasure. 6. Programming can be done only in a non-suspended sector (a sector not specified for erasure). WRITE OPERATION STATUS The HY29LV400 provides a number of facilities to determine the status of a program or erase op- eration. These are the RY/BY# (Ready/Busy#) pin and certain bits of a status word which can be read from the device during the programming and erase operations ...

Page 18

... HY29LV400 and ignores the command for the specified sec- tors that are protected. When the system detects that DQ[7] has changed from the complement to true data (or “0” to “1” for erase), it should do an additional read cycle to read valid data from DQ[7:0]. This is because DQ[7] ...

Page 19

... DQ[3] prior to When the and following each subsequent sector erase data cycle. If DQ[3] is high on the second status check, the last data cycle might not have been accepted. HY29LV400 Read DQ[7:0] Read DQ[7: DQ[2] Toggled ...

Page 20

... HY29LV400 HARDWARE DATA PROTECTION The HY29LV400 provides several methods of pro- tection to prevent accidental erasure or program- ming which might otherwise be caused by spuri- ous system level signals during V power-down transitions, or from system noise. These methods are described in the sections that follow. Command Sequences Commands that may alter array data require a sequence of cycles as described in Table 6 ...

Page 21

... V. During voltage 2 0 Figure 10. Maximum Overshoot Waveform HY29LV400 º C º º C º ...

Page 22

... HY29LV400 DC CHARACTERISTICS ...

Page 23

... Note °C. Rev. 1.0/Nov. 01 www.DataSheet. Time in ns Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 2 Frequency in MHz Figure 12. Typical I Current vs. Frequency CC1 HY29LV400 3 ...

Page 24

... HY29LV400 KEY TO SWITCHING WAVEFORMS TEST CONDITIONS Figure 13. Test Setup 3.0 V Input 0.0 V Figure 14. Input Waveforms and Measurement Levels 24 www.DataSheet. ...

Page 25

... Output Valid HY29LV400 ...

Page 26

... HY29LV400 AC CHARACTERISTICS Hardware Reset (RESET ...

Page 27

... Data Output DQ[14:0] Data Output DQ[7:0] Output DQ[15] Address Input A-1 Data Output DQ[7:0] Data Output DQ[14:0] Data Output DQ[15 Falling edge of the last WE# signal ) specifications. HY29LV400 ...

Page 28

... HY29LV400 AC CHARACTERISTICS Program and Erase Operations ...

Page 29

... the true data at the program address. OUT measurement references. It cannot occur as shown during a valid command sequence. VCS Figure 19. Program Operation Timings HY29LV400 Read Status Data (last two cycles Status ...

Page 30

... HY29LV400 AC CHARACTERISTICS Erase Command Sequence (last two cycles) t Addresses 0x2AA Data RY/BY Notes =Sector Address (for sector erase Valid Address for reading status data (see Write Operation Status section the true data at the read address.(0xFF after an erase operation). ...

Page 31

... Valid Status Valid Status (first read) (second read True Valid Data Status Data Data Valid Data V A Valid Status (stops toggling) HY29LV400 V A Valid Data 31 ...

Page 32

... HY29LV400 AC CHARACTERISTICS Enter Automatic Erase DQ[6] DQ[2] Notes: 1. The system may use CE# or OE# to toggle DQ[2] and DQ[6]. DQ[2] toggles only when read at an address within an erase-suspended sector. Sector Protect and Unprotect, Temporary Sector Unprotect ...

Page 33

... HY29LV400 Valid * Valid * Verify 0x40 Status ...

Page 34

... HY29LV400 AC CHARACTERISTICS 0x555 for Program 0x2AA for Erase Addresses Data RY/BY RESET# Notes program address program data Valid Address for reading program or erase status (see Write Opera- tion Status section Illustration shows the last two cycles of the program or erase command sequence and the last status read cycle. ...

Page 35

... º º HY29LV400 ...

Page 36

... HY29LV400 PACKAGE DRAWINGS Physical Dimensions TSOP48 - 48-pin Thin Small Outline Package (measurements in millimeters) Pin 1.20 MAX 0.25MM (0.0098") BSC 36 www.DataSheet.in 48 11.90 12.10 25 18.30 18.50 19.80 20.20 0.08 0.20 0.10 0. 0.50 0.70 0.95 1.05 0.50 BSC 0.05 0.15 Rev. 1.0/Nov. 01 ...

Page 37

... 0. Ø 0. Ø CORNER INDEX AREA 2.10 ± 0.10 6.00 ± 0.10 0. 0. Seating Plane Pin A1 Index Mark HY29LV400 37 ...

Page 38

... Note: 1. The complete part number is formed by appending the suffix shown in the table above to the Device Number. For example, the part number for a 90 ns, top boot block, Industrial temperature range device in the TSOP package is HY29LV400TT-90I. 38 www.DataSheet. ...

Page 39

... Rev. 1.0/Nov. 01 www.DataSheet.in HY29LV400 39 ...

Page 40

... HY29LV400 © 2001 by Hynix Semiconductor America. All rights reserved. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of Hynix Semiconductor Inc. or Hynix Semiconductor America (collec- tively “Hynix”). The information in this document is subject to change without notice ...

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