AT90S2313 ATMEL Corporation, AT90S2313 Datasheet
AT90S2313
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AT90S2313 Summary of contents
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... Device Description The AT90S2313 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the AT90S2313 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. ...
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... AT90S2313 is a powerful microcontroller that provides a highly flexible and cost effective solution to many embed- ded control applications. The AT90S2313 AVR is supported with a full suite of pro- gram and system development tools including: C compil- ers, macro assemblers, program debugger/simulators, in- circuit emulators, and evaluation kits. ...
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... As inputs, Port D pins that are externally pulled low will source current if the pull-up resistors are activated. Port D also serves the functions of various special features of the AT90S2313 as listed on page 43. RESET Reset input. A low on this pin for two machine cycles while the oscillator is running resets the device. ...
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... The ALU supports arithmetic and logic functions between registers or between a constant and a register. Single reg- ister operations are also executed in the ALU. Figure 4 shows the AT90S2313 AVR Enhanced RISC microcontrol- ler architecture. In addition to the register operation, the conventional mem- ory addressing modes can be used on the register file as well ...
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... Figure 4. The AT90S2313 AVR Enhanced RISC Architecture Figure 5. Memory Maps 5 ...
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... AT90S2313 Register Summary Address Name Bit 7 $3F ($5F) SREG I $3E ($5E) Reserved $3D ($5D) SPL SP7 $3C ($5C) Reserved $3B ($5B) GIMSK INT1 $3A ($5A) GIFR INTF1 $39 ($59) TIMSK TOIE1 $38 ($58) TIFR TOV1 $37 ($57) Reserved $36 ($56) Reserved $35 ($55) MCUCR - $34 ($54) Reserved $33 ($53) TCCR0 - $32 ($52) TCNT0 Timer/Counter0 (8 Bit) ...
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... AT90S2313 Instruction Set Summary Mnemonics Operands Description ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers ADC Rd, Rr Add with Carry two Registers ADIW Rdl,K Add Immediate to Word SUB Rd, Rr Subtract two Registers SUBI Rd, K Subtract Constant from Register SBIW Rdl,K ...
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... Clear Twos Complement Overflow SET Set T in SREG CLT Clear T in SREG SEH Set Half Carry Flag in SREG CLH Clear Half Carry Flag in SREG NOP No Operation SLEEP Sleep WDR Watchdog Reset AT90S2313 8 Operation Flags Rd Rr None Rd K None Rd (X) None Rd (X), X ...