AD1821 Analog Devices, AD1821 Datasheet - Page 12
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AD1821
Manufacturer Part Number
AD1821
Description
Manufacturer
Analog Devices
Datasheet
1.AD1821.pdf
(44 pages)
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AD1821
Muxed Serial Ports (8 mA Drivers)
Pin Name
I
I
I
I
I
I
SPORT_SDI*
SPORT_SCLK*
SPORT_SDFS*
SPORT_SDO*
Miscellaneous Analog Pins
Pin Name
V
V
L_FILT
R_FILT
L_AAFILT
R_AAFILT
Crystal Pin
Pin Name
XTALO
XTALI
External Logical Devices
Pin Name
LD_IRQ*
LD_DACK*
LD_DRQ*
LD_SEL*
MDM_SEL*
MDM_IRQ*
LD_SEL1*
PNPRST*
2
2
2
2
2
2
REF_X
REF
S(0)_BCLK*
S(0)_LRCLK*
S(0)_DATA*
S(1)_BCLK*
S(1)_LRCLK*
S(1)_DATA*
PQFP
3
2
1
82
83
81
100
97
98
99
PQFP
36
35
38
37
40
39
PQFP
64
63
PQFP
100
99
98
97
83
82
69
68
O
I/O
I
I
I
I
I
I
I
O
O
I/O
O
I
I
I
I
I
I/O
O
I
I/O
I
O
I
O
O
I
O
O
Description
I
I
I
I
I
I
Serial Port Digital Serial Input.
Serial Port Serial Clock.
Serial Port Serial Data Frame Synchronization.
Serial Port Serial Data Output.
Description
Voltage Reference. Nominal 2.25 volt reference available for dc-cou-
pling and level-shifting. V
nal current.
Voltage Reference Filter. Voltage reference filter point for external by-
passing only.
Left Channel Filter. Requires a 1.0 F to analog ground for proper
operation.
Right Channel Filter. Requires a 1.0 F to analog ground for proper
operation.
Left Channel Antialias Filter. This pin requires a 270 pF NPO
capacitor to analog ground for proper operation.
Right Channel Antialias Filter. This pin requires a 270 pF NPO
capacitor to analog ground for proper operation.
Description
33 MHz Crystal Output. If no Crystal is present leave XTALO
unconnected.
33 MHz Clock. When using a crystal as a clock source, the crystal
should be connected between the XTALI and XTALO pins. Clock in-
put may be driven into XTALI in place of a crystal. When using an ex-
ternal clock, V
for all other digital inputs.
Description
Logical Device IRQ.
Logical Device DACK.
Logical Device DRQ.
Logical Device Select.
Modem Chip Set Select.
Modem Chip Set IRQ.
Logical Device (1) Select.
Plug and Play Reset.
2
2
2
2
2
2
S (0) Bit Clock.
S (0) Left/Right Clock.
S (0) Serial Data Input.
S (1) Bit Clock.
S (1) Left/Right Clock.
S (1) Serial Data Input.
–12–
IH
must be 2.4 V rather than the V
REF_X
should not be used to sink or source sig-
IH
of 2.0 V specified
REV. 0