ATA8742 ATMEL Corporation, ATA8742 Datasheet - Page 85
ATA8742
Manufacturer Part Number
ATA8742
Description
Manufacturer
ATMEL Corporation
Datasheet
1.ATA8742.pdf
(238 pages)
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9151A–INDCO–07/09
• Port B, Bit 3 – RESET/dW/PCINT11
RESET: External Reset input is active low and enabled by unprogramming (“1”) the RSTDISBL
Fuse. Pullup is activated and output driver and digital input are deactivated when the pin is used
as the RESET pin.
dW: When the debugWIRE Enable (DWEN) Fuse is programmed and Lock bits are unpro-
grammed, the debugWIRE system within the target device is activated. The RESET port pin is
configured as a wire-AND (open-drain) bi-directional I/O pin with pull-up enabled and becomes
the communication gateway between target and emulator.
PCINT11: Pin Change Interrupt source 11. The PB3 pin can serve as an external interrupt
source for pin change interrupt 1.
Table 19-8 on page 85
overriding signals shown in
Table 19-8.
1.
2.
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
RSTDISBL is 1 when the Fuse is “0” (Programmed).
DebugWIRE is enabled when DWEN Fuse is programmed and Lock bits are unprogrammed.
PB3/
PCINT11
RSTDISBL
1
RSTDISBL
DEBUGWIRE_ENABLE
Transmit
RSTDISBL
0
0
RSTDISBL
PCINT11 • PCIE1
DEBUGWIRE_ENABLE
PCINT11 • PCIE1)
dW/PCINT11 Input
Overriding Signals for Alternate Functions in PB3..PB2
RESET/dW/
(1)
(1)
(1)
(1)
and
+ DEBUGWIRE_ENABLE
+ DEBUGWIRE_ENABLE
+ DEBUGWIRE_ENABLE
+ DEBUGWIRE_ENABLE
Figure 19-5 on page
Table 19-9 on page 86
(2)
(2)
+ (RSTDISBL
• debugWire
(2)
(2)
(2)
(2)
(1)
78.
+
•
relate the alternate functions of Port B to the
PB2/INT0/OC0A/CKOUT/PCINT10
CKOUT
0
CKOUT
1'b1
CKOUT + OC0A enable
CKOUT • System Clock + CKOUT • OC0A
0
PCINT10 • PCIE1 + INT0
PCINT10 • PCIE1 + INT0
INT0/PCINT10 Input
ATA8742
85
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