CS6652 Amphion, CS6652 Datasheet - Page 4

• Manufacturer Part Number: CS6652
• Description: 2-stream Video Decoder
• Manufacturer: Amphion

4
Picture Output Interface (One per elementary stream)
P_Data
P_DataStrobe
P_DataAvail
P_DataType
P_RowDoneIn
P_PicDoneIn
P_RowDoneOut
P_PicDoneOut
P_General
Frame Store Interface
SD_DataIn
SD_DataOut
SD_notDatDrv
SD_Addr
SD_BA
SD_DQM
SD_notRAS
SD_notCAS
SD_notWE
SD_notCS
CS6652/54
Signal
Width
16
64
64
11
1
1
4
1
1
1
1
8
1
2
8
1
1
1
1
Multi-stream MPEG-2 Video Decoders
Table 2: CS6652/54 Interface Signal Definitions
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input
Input
Input
I/O
Picture Output Data, from the display DMA. Contains either Y, Cr or Cb, as indicated by
P_DataType. In 16-bit mode the upper 8 bits carry Y and the lower 8 bits carry either Cr
or Cb as indicated by P_DataType.
Data Taken Strobe, indicates that the external logic will consume the current P_Data on
the next positive edge of Clk. The signal is also used as a qualifier for the
P_RowDoneIn and P_PicDoneIn signals.
Data Valid Signal, indicates that the DMA engine has been configured and is running
and P_Data carries a valid picture sample.
Picture Data Type, indicates the type of sample on P_Data. The bottom two bits carry
the component identification as follows:
00 = Y
01 = Y
10 = Cb
11 = Cr.
The top two bits carry display frame/field information as follows:
00 = progressive
01 = undefined
10 = top field
11 = bottom field.
Last Pixel in Row, used to terminate a row scan and move on to the next. This may be
used with pan and scale external logic. This input is ignored in certain DMA configura-
tions. Should be asserted for the last byte of the pixel sample group – the engine will
stop after the last component for the group is taken.
Last Pixel in Picture, indicates that the display of the picture is complete at the end of
the current pixel. The engine will revert to idle mode. This input is ignored in certain
DMA configurations. Should be asserted for the last byte of the pixel sample group –
the engine will stop after the last component for the group is taken.
Last Pixel in Row, This output can be programmed to indicate the last component of the
last pixel of the row. This requires the correct configuration of the DMA engine row
length register.
Last Pixel in Picture, This output can be programmed to indicate the last component of
the last pixel of the picture. This requires the correct configuration of the DMA engine
row and column length registers.
General Outputs, These outputs directly reflect the programmed value in the DMA gen-
eral Output register. They can be used by the host CPU to inform the display logic of
specific display parameters such as PAL/NTSC encoding information etc.
SDRAM Data Input, read data input from external SDRAM.
SDRAM Data Output, write data output to external SDRAM.
SDRAM Data Drive, active LOW enable signal for SDRAM data bus tristate drivers.
Driven low when SD_DataOut should be placed on the bus.
SDRAM Address bus, carries row or column addresses or commands to the external
SDRAM.
SD_BA, indicates selected bank for the current SDRAM command.
SDRAM DQ Mode, used to control burst transfers of data to/from the SDRAM.
SDRAM Row Address Strobe, strobes a row address or command into the SDRAM.
SDRAM Column Address Strobe, strobes a column address or command into the
SDRAM.
SDRAM Write Enable, indicates to the SDRAM that a write command is required.
SDRAM Chip Select, active except for reset.
1
2
Description