ADIS16203 Analog Devices, Inc., ADIS16203 Datasheet - Page 19

• Manufacturer Part Number: ADIS16203
• Description: Programmable 360 Inclinometer
• Manufacturer: Analog Devices, Inc.

AVG_CNT Register Definition
Address
0x39, 0x38
1
The AVG_CNT register contains information that represents the
number of averages to be applied to the output data. The number of
averages can be calculated by powers of 2. The number of averages
can be set to 1, 2, 4, 8, 16, 32, 64, 128, or 256.
Table 17. AVG_CNT Bit Description
Bit
15:4
3:0
Default is valid only until the first register write cycle.
–20
–40
–60
–20
–40
–60
20
20
0
0
1
1
Figure 31. SUPPLY_OUT, AUX_ADC, and TEMP_OUT Filter Response,
AVG_CNT = 8
AVG_CNT = 8
Description
Not used
Data bits (maximum = 1000, or a decimal value of 8)
Figure 30. INCL_OUT, INCL_180_OUT Filter Response
N = 256
N = 256
Default
0x0007
10
10
AVG_CNT = 4
AVG_CNT = 4
FREQUENCY (Hz)
FREQUENCY (Hz)
1
N = 16
N = 16
AVG_CNT = 1
100
100
f
S
N = 2
= 4096 SPS
Format
Binary
1000
1000
CORE SENSOR
RESPONSE
AVG_CNT = 1
N = 2
Access
R/W
10000
10000
Rev. 0 | Page 19 of 28
POWER-DOWN CONTROL
The ADIS16203 has the ability to power down for user-defined
amounts of time, using the SLP_CNT control register. The
amount of time specified by the SLP_CNT control register is
equal to the binary count of the 8-bit control word multiplied
by 0.5 sec. Therefore, the 255 codes cover an overall shutdown
period of 127.5 seconds. The SLP_CNT register is volatile and is
set to 0 upon both power-up and subsequent wake-ups from the
power-down period. By setting the SLP_CNT control register to
a nonzero state, the ADIS16203 automatically powers down
once the next sample period is completed and the data output
registers are updated.
Once the ADIS16203 is placed into power-down mode, it can
only return to normal operation by timing out, by a reset command
(using the RST hardware control line), or by cycling the power
applied to the part. Once awake, the data output registers can be
scanned to determine what the state of the output registers were
prior to powering down. Once the data is recovered, the device
can be powered down again by simply writing a nonzero value
to the SLP_CNT control register and starting the process over.
Once the power-down time is complete, the recovery time for
the ADIS16203 is approximately 2 ms. This recovery time is
implemented within the device to allow for recovery of the
ADC prior to performing the next data conversion. Note that
the ND data bit within the data output control registers is cleared
when the ADIS16203 is powered down. Likewise, the new data
hardware I/O line is placed into an inactive state prior to being
powered down. The DAC is placed into a power-down mode as
well, resulting in the DAC output dropping to 0 V during the
power-down period. All control register settings are retained
while powered down with the exception of the SLP_CNT
control register.
SLP_CNT Register Definition
Address
0x3B, 0x3A
1
Table 18. SLP_CNT Bit Descriptions
Bit
15:8
7:0
Default is valid only until the first register write cycle.
Description
Not used
Data bits
0x0000
Default
1
Format
Binary
ADIS16203
Access
R/W