TLE 8261E Infineon Technologies, TLE 8261E Datasheet - Page 62

• Manufacturer Part Number: TLE 8261E
• Manufacturer: Infineon Technologies

Specifications of TLE 8261E

• Packages: PG-DSO-36
• Transceiver: High Speed CAN ISO 11898 - 5
• Voltage Regulator Output: 2 x 200 mA + 400 mA
• Watchdog: Standard and Window Watchdog
• Quiescent Current (max.): 28 ?A (typ) Sleep Mode (5V on)
• Standby Current: 58 ?A (typ) Stop Mode (5V on)

14.4
Figure 32
14.5
14.5.1
The WD Refresh bit is used to trigger the Watchdog. The first trigger should be a
please refer to
The WK state bit gives the voltage level at the WK pin. A
Data Sheet
INTERRUPT
Status or
REGISTER
event
Output
Data
SPI Output Data
16-bit SPI Output Data / Control Word
SPI Data Encoding
WD Refresh bit / WK state
Chapter
MSB
15 14 13 12 11 10
state
WK
10.2.
WD set
Wrong
WD to
CHK
SUM
Res.
Res.
Res.
INT
LH
On/off
Cyclic
On/Off
Reset
Res.
Res.
CAN
RM1
WK
WD
1
Configuration Registers
On/off
Cyclic
CAN
Res.
L.H.
Out /
RM0
Win.
WK
Fail
SPI
Ti.
0
WK pin
On/Off
I
Set to
WK 1
I
LH 2
CC3max
V
Res.
Res.
CC3
CC2
1
Reserved
>
WK pin
On /off
WK PIN
WK 0
LH 1
Res.
Res.
V
Window /Time out Watchdog
UV
Timing Bit Position: 10 .. 6
cc3
On/off
Res.
LH 0
V
V
Res.
Res.
UV
9
CC3
CC2
62
1
Test 2
Reset
Delay
Res.
CAN
Res.
V
Bus
8
OT
CC2
indicates a high level, a
Test 1 Test 0
failure
HS CAN
Res.
CAN
RT1
Res.
7
OT
1
failure
V
CAN
RT0
OTP
CAN
Res.
WK
6
cc1µC
0
CS2
Configuration Select
5
001
011
010
110
000
100
101
111
CS1
4
1
, and then a
0
CS0
Serial Peripheral Interface
3
a low level.
SPI_Settings_out_TLE8261.vsd
Mode Selection
MS2
2
SW Flash
Reserved
Rev. 1.0, 2009-03-31
Fail Safe
Restart
Normal
Sleep
0
Stop
Bits
Init
. For more details,
MS1
1
TLE8261E
LSB
MS0
0
011
101
001
100
110
111
000
010