DS1243 Maxim, DS1243 Datasheet - Page 3

• Manufacturer Part Number: DS1243
• Description: The DS1243Y 64K NV SRAM with Phantom Clock is a fully static nonvolatile RAM (organized as 8192 words by 8 bits) with a built-in real time clock
• Manufacturer: Maxim

RAM READ MODE
The DS1243Y executes a read cycle whenever
Enable) is active (low). The unique address specified by the 13 address inputs (A0–A12) defines which of
the 8192 bytes of data is to be accessed. Valid data will be available to the eight data output drivers
within t
Enable) access times and states are also satisfied. If
access must be measured from the later occurring signal (
t
RAM WRITE MODE
The DS1243Y is in the write mode whenever the
address inputs are stable. The latter occurring falling edge of
write cycle. The write cycle is terminated by the earlier rising edge of
be kept valid throughout the write cycle.
(t
write cycles to avoid bus contention. However, if the output bus has been enabled (
then
DATA RETENTION MODE
The DS1243Y provides full functional capability for V
Data is maintained in the absence of V
RAM constantly monitors V
itself. All inputs to the RAM become “don’t care” and all outputs are high impedance. As V
approximately 3.0V, the power switching circuit connects the lithium energy source to RAM to retain
data. During power-up, when V
external V
after V
See “Conditions of Acceptability” at
FRESHNESS SEAL
Each DS1243Y is shipped from Maxim with its lithium energy source disconnected, insuring full energy
capacity. When V
battery backup operation.
CO
WR
for
) before another cycle can be initiated. The
WE
CC
CE
ACC
exceeds 4.5V.
will disable the outputs in t
CC
or t
(Access Time) after the last address input signal is stable, providing that
to the RAM and disconnects the lithium energy source. Normal RAM operation can resume
OE
for
CC
OE
is first applied at a level greater than V
rather than address access.
CC
. Should the supply voltage decay, the RAM automatically write protects
CC
rises above approximately 3.0V, the power switching circuit connects
www.maxim-ic.com/TechSupport/QA/ntrl.htm
ODW
CC
from its falling edge.
WE
without any additional support circuitry. The nonvolatile static
must return to the high state for a minimum recovery time
OE
3 of 14
WE
WE
OE
control signal should be kept inactive (high) during
(Write Enable) is inactive (high) and
and
CC
and
CE
greater than V
CE
TP
CE
or
CE
, the lithium energy source is enabled for
signals are in the active (low) state after
OE
access times are not satisfied, then data
or
) and the limiting parameter is either
CE
WE
TP
or
will determine the start of the
and write protects by 4.25V.
WE
. All address inputs must
CE
CE
and
and
CC
OE
falls below
OE
CE
(Output
active)
(Chip