DS2431 Maxim, DS2431 Datasheet - Page 17

• Manufacturer Part Number: DS2431
• Description: The DS2431 is a 1024-bit, 1-Wire® EEPROM chip organized as four memory pages of 256 bits each
• Manufacturer: Maxim

Figure 10. Initialization Procedure: Reset and Presence Pulse
Data communication with the DS2431 takes place in
time slots that carry a single bit each. Write time slots
transport data from bus master to slave. Read time
slots transfer data from slave to master. Figure 11 illus-
trates the definitions of the write and read time slots.
All communication begins with the master pulling the
data line low. As the voltage on the 1-Wire line falls
below the threshold V
timing generator that determines when the data line is
sampled during a write time slot and how long data is
valid during a read time slot.
For a write-one time slot, the voltage on the data line
must have crossed the V
one low time t
slot, the voltage on the data line must stay below the
V
expired. For the most reliable communication, the volt-
age on the data line should not exceed V
the entire t
has been crossed, the DS2431 needs a recovery time
t
REC
TH
threshold until the write-zero low time t
before it is ready for the next time slot.
V
IHMASTER
W0L
V
ILMAX
V
V
W1LMAX
PUP
V
0V
TH
TL
or t
______________________________________________________________________________________
W1L
TL
is expired. For a write-zero time
window. After the V
t
F
, the DS2431 starts its internal
TH
Read/Write Time Slots
MASTER Tx "RESET PULSE"
threshold before the write-
RESISTOR
Master-to-Slave
t
RSTL
ILMAX
TH
W0LMIN
threshold
during
is
1024-Bit, 1-Wire EEPROM
ε
A read-data time slot begins like a write-one time slot.
The voltage on the data line must remain below V
until the read low time t
window, when responding with a 0, the DS2431 starts
pulling the data line low; its internal timing generator
determines when this pulldown ends and the voltage
starts rising again. When responding with a 1, the
DS2431 does not hold the data line low at all, and the
voltage starts rising as soon as t
The sum of t
nal timing generator of the DS2431 on the other side
define the master sampling window (t
t
from the data line. For the most reliable communication,
t
should read close to but no later than t
reading from the data line, the master must wait until
t
time t
slot. Note that t
single DS2431 attached to a 1-Wire line. For multide-
vice configurations, t
modate the additional 1-Wire device input capacitance.
Alternatively, an interface that performs active pullup
during the 1-Wire recovery time such as the DS2482-
x00 or DS2480B 1-Wire line drivers can be used.
MASTER
MSRMAX
RL
SLOT
t
PDH
should be as short as permissible, and the master
REC
t
is expired. This guarantees sufficient recovery
MSP
), in which the master must perform a read
MASTER Rx "PRESENCE PULSE"
for the DS2431 to get ready for the next time
t
PDL
RL
t
RSTH
+ δ (rise time) on one side and the inter-
REC
specified herein applies only to a
REC
RL
must be extended to accom-
t
REC
is expired. During the t
DS2431
RL
is over.
Slave-to-Master
MSRMAX
MSRMIN
. After
17
RL
TL
to