ADP2114 Analog Devices, ADP2114 Datasheet - Page 25

• Manufacturer Part Number: ADP2114
• Description: Configurable, Dual 2 A/Single 4 A, Synchronous Step-Down DC-to-DC Regulator
• Manufacturer: Analog Devices

SETTING THE OSCILLATOR FREQUENCY
The ADP2114 channels can be set to operate in one of the three
preset switching frequencies: 300 kHz, 600 kHz, or 1.2 MHz.
For 300 kHz operation, connect the FREQ pin to GND. For
600 kHz or 1.2 MHz operation, connect a resistor between the
FREQ pin and GND, as shown in Table 5.
Table 5. Oscillator Frequency Setting
R
0 to GND
8.2 k to GND
27 k to GND
Choice of the switching frequency depends on the required
dc-to-dc conversion ratio and is limited by the minimum and
maximum controllable duty cycle shown on Figure 72. This is
due to the requirement of minimum on and minimum off times
for current sensing and robust operation. The choice of
switching frequency is also determined by the need for small
external components. For small, area limited power solutions,
use of higher switching frequencies is recommended.
For single output, multiphase applications that operate at close
to 50% duty cycle, it is recommended to use the 1.2 MHz
switching frequency to minimize crosstalk between the phases.
SYNCHRONIZATION AND CLKOUT
The ADP2114 can be configured to output an internal clock or
synchronize to an external clock at the STNC/CLKOUT pin.
The SYNC/CLKOUT pin is a bidirectional pin configured by
the SCFG pin, as shown in Table 6.
Table 6. SYNC/CLKOUT Configuration Setting
SCFG
GND
VDD
The converter switching frequency, f
zation frequency f
of whether SYNC/CLKOUT is configured as an input or output.
FREQ
f
(Ω) ± 5%
SYNC/
100
90
80
70
60
50
40
30
20
10
0
200
f
CLKOUT
= 2 × f
Figure 72. Duty Cycle Working Limits
SYNC
400
MAXIMUM LIMIT
MINIMUM LIMIT; V
MINIMUM LIMIT; V
MINIMUM LIMIT; V
/f
SWITCHING FREQUENCY (kHz)
CLKOUT
Input
SYNC/CLKOUT
Output
SW
600
as shown in Equation 4, irrespective
IN
IN
IN
f
300
600
1200
= 2.75V
= 3.3V
= 5.5V
SW
SW
(kHz)
800
, is half of the synchroni-
1000
1200
Rev. 0 | Page 25 of 40
(4)
An external clock can be applied to the SYNC/CLKOUT pin
when configured as an input to synchronize multiple ADP2114s
to the same external clock. The f
which produces f
for an illustration.
When synchronizing to an external clock, the switching
frequency f
clock frequency by appropriately terminating the FREQ pin as
shown in Table 5.
The ADP2114 can also be configured to output a clock signal
on the SYNC/CLKOUT pin to synchronize multiple ADP2114s
to it (see Figure 74). The CLKOUT signal is 90º phase shifted to
the internal clock of the channels so that the master ADP2114
and the slave channels are out of phase (see Figure 75 for
additional information).
Figure 73. Synchronization with External Clock (f
TO OTHER ADP2114
NOTES
1.
f
EXTERNAL CLOCK (2.4MHz)
SYNC
f
SW
4
3
1
= 600kHz SET FOR BOTH ADP2114.
CH1 5.0V
CH3 5.0V
Figure 74. ADP2114 to SYNC with Another ADP2114
SW
(Note that the SCFG of the master is tied to VDD.)
must be set close to half of the expected external
SCFG
SYNC
SCFG
SYNC
f
(
(
SYNC
SW
f
f
ADP2114
SW
ADP2114
8.2kΩ
SW
27kΩ
CH4 5.0V
in the 200 kHz to 2 MHz range. See Figure 73
Figure 75. CLKOUT Waveforms
FREQ
=
FREQ
=
= 2 ×
f
f
SYNC
SYNC
f
INTERNAL CLKOUT
SW
/2)
/2)
CHANNEL 1 SW
CHANNEL 2 SW
VDD
VDD
M1.0µs
SYNC
range is 400 kHz to 4 MHz,
SCFG
CLKOUT
SCFG
SYNC
TO OTHER ADP2114
SW
(
(
f
f
ADP2114
ADP2114
SW
SW
8.2kΩ
= 1.2 MHz in This Case)
A CH4
27kΩ
FREQ
= 2 ×
FREQ
=
f
SYNC
ADP2114
f
SW
/2)
3.00V
)
VDD
VDD
V
V
IN
IN