ADP5042 Analog Devices, ADP5042 Datasheet - Page 24
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ADP5042
Manufacturer Part Number
ADP5042
Description
Micro PMU with 0.8 A Buck, Two 300 mA LDOs, Supervisory, Watchdog and Manual Reset
Manufacturer
Analog Devices
Datasheet
1.ADP5042.pdf
(32 pages)
ADP5042
The peak-to-peak output voltage ripple for the selected output
capacitor and inductor values is calculated using the following
equation:
Capacitors with lower equivalent series resistance (ESR) are
preferred to guarantee low output voltage ripple, as shown in
the following equation:
The effective capacitance needed for stability, which includes
temperature and dc bias effects, is a minimum of 7 µF and a
maximum of 40 µF.
Table 12. Suggested 10 μF Capacitors
Vendor
Murata
Taiyo Yuden
TDK
Panasonic
The buck regulator requires 10 µF output capacitors to guaran-
tee stability and response to rapid load variations and to transition
in and out the PWM/PSM modes. In certain applications, where
the buck regulator powers a processor, the operating state is
known because it is controlled by software. In this condition,
the processor can drive the MODE pin according to the operating
state; consequently, it is possible to reduce the output capacitor
from 10 µF to 4.7 µF because the regulator does not expect a
large load variation when working in PSM mode (see Figure 62).
2.3V TO 5.5V
Figure 62. Processor System Power Management with PSM/PWM Control
V
V
ESR
IN
RIPPLE
COUT
=
R
30Ω
FLT
≤
(
2
Type
X5R
X5R
X5R
X5R
V
π
I
C3
1µF
C2
4.7µF
C1
1µF
RIPPLE
RIPPLE
×
AVIN
VIN1
VIN2
VIN3
f
SW
MICRO PMU
ADP5042
)
Model
GRM188R60J106
JMK107BJ475
C1608JB0J106K
ECJ1VB0J106M
V
×
IN
2
×
L
×
C
SW
VOUT1
PGND
VOUT2
VOUT3
nRSTO
OUT
WDI
MODE
ENx
1µF
C4
1µH
L1
=
8
3
×
Case
Size
0603
0603
0603
0603
f
R1
100kΩ
I
C6
4.7µF
C5
1µF
SW
RIPPLE
×
SUB-SYSTEM
PROCESSOR
C
VCORE
VDDIO
RESET
GPIO1
GPIO2
GPIO[x:y]
VANA
ANALOG
Voltage
Rating (V)
6.3
6.3
6.3
6.3
OUT
Rev. A | Page 24 of 32
Input Capacitor
Higher value input capacitors help to reduce the input voltage
ripple and improve transient response. Maximum input
capacitor current is calculated using the following equation:
To minimize supply noise, place the input capacitor as close
to the VIN pin of the buck as possible. As with the output
capacitor, a low ESR capacitor is recommended.
The effective capacitance needed for stability, which includes
temperature and dc bias effects, is a minimum of 3 µF and a
maximum of 10 µF. A list of suggested capacitors is shown in
Table 13.
Table 13. Suggested 4.7 μF Capacitors
Vendor
Murata
Taiyo Yuden
Panasonic
LDO CAPACITOR SELECTION
Output Capacitor
The ADP5042 LDOs are designed for operation with small,
space-saving ceramic capacitors, but they function with most
commonly used capacitors as long as care is taken with the ESR
value. The ESR of the output capacitor affects stability of the
LDO control loop. A minimum of 0.70 µF capacitance with an
ESR of 1 Ω or less is recommended to ensure stability of the
ADP5042. Transient response to changes in load current is also
affected by output capacitance. Using a larger value of output
capacitance improves the transient response of the ADP5042 to
large changes in load current.
Input Bypass Capacitor
Connecting a 1 µF capacitor from VIN2 and VIN3 to GND
reduces the circuit sensitivity to printed circuit board (PCB)
layout, especially when long input traces or high source
impedance is encountered. If greater than 1 µF of output
capacitance is required, increase the input capacitor to match it.
Table 14. Suggested 1.0 μF Capacitors
Vendor
Murata
TDK
Panasonic
Taiyo Yuden
I
CIN
≥
I
LOAD
Type
X5R
X5R
X5R
Type
X5R
X5R
X5R
X5R
(
MAX
)
Model
GRM188R60J475ME19D
JMK107BJ475
ECJ-0EB0J475M
Model
GRM155R61A105ME15
C1005JB0J105KT
ECJ0EB0J105K
LMK105BJ105MV-F
V
OUT
(
V
V
IN
IN
−
V
OUT
)
Data Sheet
Case
Size
0603
0603
0402
Case
Size
0402
0402
0402
0402
Voltage
Rating
(V)
6.3
6.3
6.3
Voltage
Rating
(V)
10.0
6.3
6.3
10.0