SAM3SD8B Atmel Corporation, SAM3SD8B Datasheet - Page 38

• Manufacturer Part Number: SAM3SD8B
• Manufacturer: Atmel Corporation

10.13 Chip Identification
10.14 UART
10.15 PIO Controllers
38
SAM3S8/SD8 Summary
Table 10-1.
Table 10-2.
• Chip Identifier (CHIPID) registers permit recognition of the device and its revision.
• JTAG ID: 0x05B2D03F
• Two-pin UART
• 3 PIO Controllers, PIOA, PIOB and PIOC (100-pin version only) controlling a maximum of 79
• Each PIO Controller controls up to 32 programmable I/O Lines
• Fully programmable through Set/Clear Registers
• Multiplexing of four peripheral functions per I/O Line
• For each I/O Line (whether assigned to a peripheral or used as general purpose I/O)
I/O Lines
SAM3SD8C (Rev A)
SAM3SD8B (Rev A)
SAM3S8B (Rev A)
SAM3S8C (Rev A)
Version
– Implemented features are 100% compatible with the standard Atmel USART
– Independent receiver and transmitter with a common programmable Baud Rate
– Even, Odd, Mark or Space Parity Generation
– Parity, Framing and Overrun Error Detection
– Automatic Echo, Local Loopback and Remote Loopback Channel Modes
– Support for two PDC channels with connection to receiver and transmitter
– Input change interrupt
– Programmable Glitch filter
– Programmable debouncing filter
– Multi-drive option enables driving in open drain
– Programmable pull-up on each I/O line
– Pin data status register, supplies visibility of the level on the pin at any time
– Additional interrupt modes on a programmable event: rising edge, falling edge, low
PIOA
PIOB
PIOC
Generator
level or high level
Chip Name
SAM3S8/SD8 Hip IDs Register
PIO available according to pin count
64 pin
32
15
-
Flash Size
(KBytes)
512
512
512
512
Pin Count
100
100
64
64
100 pin
32
15
32
CHIPID_CIDR
0x28AB0A60
0x289B0A60
0x299B0A60
0x29AB0A60
11090AS–ATARM–10-Feb-12
CHIPID_EXID
0x0
0x0
0x0
0x0