SAM9XE512 Atmel Corporation, SAM9XE512 Datasheet - Page 63
SAM9XE512
Manufacturer Part Number
SAM9XE512
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9260.pdf
(290 pages)
2.SAM9261.pdf
(248 pages)
3.SAM9XE128.pdf
(860 pages)
4.SAM9XE128.pdf
(48 pages)
Specifications of SAM9XE512
Flash (kbytes)
512 Kbytes
Pin Count
217
Max. Operating Frequency
180 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
6
Ssc
1
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
312
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.65 to 1.95
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9260 PDF datasheet
- SAM9261 PDF datasheet #2
- SAM9XE128 PDF datasheet #3
- SAM9XE128 PDF datasheet #4
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- Download datasheet (2Mb)
2.3.14
ARM DDI0198D
Register c14
31
Where A1, A2, and A3 are the three instructions following the fast context switch.
Context ID Register
The Context ID Register provides a mechanism to allow real-time trace tools to identify
the currently executing process in multi-tasking environments.
The contents of this register are replicated on the ETMPROCID pins of the
ARM926EJ-S processor. ETMPROCIDWR is pulsed when a write occurs to the
Context ID Register.
Table 2-27 shows the ARM instructions that you can use to access the Context ID
Register.
The format of the Context ID Register, Rd, transferred during this operation is shown
in Figure 2-16.
Accessing (reading or writing) this register is reserved.
Copyright © 2001-2003 ARM Limited. All rights reserved.
Function
Read context ID
Write context ID
Context identifier
Table 2-27 Context ID register operations
Figure 2-16 Context ID Register format
Data
Context ID
Context ID
ARM Instruction
Programmer’s Model
0
2-35
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