SAM9G35 Atmel Corporation, SAM9G35 Datasheet - Page 469
SAM9G35
Manufacturer Part Number
SAM9G35
Description
Manufacturer
Atmel Corporation
Specifications of SAM9G35
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
105
Ext Interrupts
105
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
3
Uart
6
Lin
4
Ssc
1
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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30.7.10
Name:
Address:
Access:
Reset:
This register can only be written if the bit WPEN is cleared in
• DIS_ANTICIP_READ: Anticip Read Access
0 = anticip read access is enabled.
1 = anticip read access is disabled (default).
DIS_ANTICIP_READ allows DDR2 read access optimization with multi-port.
As this feature is based on the “bank open policy”, the software must map different buffers in different DDR2 banks to take
advantage of that feature.
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
31
23
15
–
–
–
7
–
DDRSDRC High Speed Register
DDRSDRC_HS
0xFFFFE82C
Read-write
See
Table 30-16
30
22
14
–
–
–
6
–
.
29
21
13
–
–
–
5
–
28
20
12
–
–
–
4
–
“DDRSDRC Write Protect Mode Register” on page
27
19
11
–
–
–
3
–
DIS_ANTICIP_RE
AD
26
18
10
–
–
–
2
25
17
–
–
9
–
1
–
SAM9G35
SAM9G35
470.
24
16
–
–
8
–
0
–
469
469
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