SAM9G35 Atmel Corporation, SAM9G35 Datasheet - Page 1109
SAM9G35
Manufacturer Part Number
SAM9G35
Description
Manufacturer
Atmel Corporation
Specifications of SAM9G35
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
105
Ext Interrupts
105
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
3
Uart
6
Lin
4
Ssc
1
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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45.7.10
Name:
Address:
Access:
Reset:
• CLKSTS: Clock Status
0: Pixel Clock is disabled.
1: Pixel Clock is running.
• LCDSTS: LCD Controller Synchronization status
0: Timing Engine is disabled.
1: Timing Engine is running.
• DISPSTS: LCD Controller DISP Signal Status
0: DISP is disabled.
1: DISP signal is activated.
• PWMSTS: LCD Controller PWM Signal Status
0: PWM is disabled.
1: PWM signal is activated.
• SIPSTS: Synchronization In Progress
0: Clock domain synchronization is terminated.
1: A double domain synchronization is in progress, access to the LCDC_LCDEN and LCDC_LCDDIS registers has no
effect.
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
31
23
15
–
–
–
7
–
LCD Controller Status Register
LCDC_LCDSR
0xF8038028
Read-only
0x00000000
30
22
14
–
–
–
6
–
29
21
13
–
–
–
5
–
SIPSTS
28
20
12
–
–
–
4
PWMSTS
27
19
11
–
–
–
3
DISPSTS
26
18
10
–
–
–
2
LCDSTS
25
17
–
–
9
–
1
SAM9G35
SAM9G35
CLKSTS
24
16
–
–
8
–
0
1109
1109
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