SAM9260 Atmel Corporation, SAM9260 Datasheet - Page 272
SAM9260
Manufacturer Part Number
SAM9260
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.M40800.pdf
(153 pages)
3.SAM9260.pdf
(290 pages)
4.SAM9260.pdf
(802 pages)
5.SAM9260.pdf
(47 pages)
Specifications of SAM9260
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
210 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
7
Ssc
1
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
312
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- M40800 PDF datasheet
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- SAM9260 PDF datasheet #4
- SAM9260 PDF datasheet #5
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Debug in depth
C-32
If bit 3 of the control register is programmed to 0, the comparators examine the
instruction address, instruction data, and instruction control buses. In this case bits [2]
and [0] of the mask register must be set to don’t care (programmed to 1_1). The format
of the register in this case is as shown in Figure C-9.
Table C-5 Watchpoint control register for data comparison functions (continued)
Bit
number
6
7
8
Copyright © 2000 ARM Limited. All rights reserved.
Name
CHAIN
RANGE
ENABLE
Figure C-9 Watchpoint control register for instruction comparison
Function
Selects the chain output of another watchpoint unit in order to
implement some debugger requests. For example, breakpoint on
address YYY only when in process XXX.
In the ARM9E-S EmbeddedICE-RT logic, the CHAINOUT
output of watchpoint 1 is connected to the CHAIN input of
watchpoint 0. The CHAINOUT output is derived from a latch.
The address or control field comparator drives the write enable
for the latch and the input to the latch is the value of the data
field comparator. The CHAINOUT latch is cleared when the
control value register is written or when DBGnTRST is LOW.
Can be connected to the range output of another watchpoint
register. In the ARM9E-S EmbeddedICE-RT logic, the address
comparator output of watchpoint 1 is connected to the RANGE
input of watchpoint 0. This allows you to couple two
watchpoints for detecting conditions that occur simultaneously,
for example, for range-checking.
If a watchpoint match occurs, the internal DWPT signal is only
asserted when the ENABLE bit is set. This bit only exists in the
value register. It cannot be masked.
ARM DDI 0165B
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