SAM4S16C Atmel Corporation, SAM4S16C Datasheet - Page 229

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SAM4S16C

Manufacturer Part Number
SAM4S16C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM4S16C

Flash (kbytes)
1024 Kbytes
Pin Count
100
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
11.9.1.14
Name:
Access:
Reset:
• MMFSR: Memory Management Fault Status Subregister
The flags in the MMFSR subregister indicate the cause of memory access faults. See bitfield [7..0] description in
11.9.1.13.
• BFSR: Bus Fault Status Subregister
The flags in the BFSR subregister indicate the cause of a bus access fault. See bitfield [14..8] description in
11.9.1.13.
• UFSR: Usage Fault Status Subregister
The flags in the UFSR subregister indicate the cause of a usage fault. See bitfield [31..15] description in
Note:
The SCB_CFSR register indicates the cause of a memory management fault, bus fault, or usage fault. It is byte accessible.
The user can access the SCB_CFSR register or its subregisters as follows:
11100A–ATARM–28-Oct-11
11100A–ATARM–28-Oct-11
• access complete SCB_CFSR with a word access to 0xE000ED28
• access MMFSR with a byte access to 0xE000ED28
• access MMFSR and BFSR with a halfword access to 0xE000ED28
• access BFSR with a byte access to 0xE000ED29
• access UFSR with a halfword access to 0xE000ED2A.
31
23
15
7
The UFSR bits are sticky. This means that as one or more fault occurs, the associated bits are set to 1. A bit that is set to 1 is
cleared to 0 only by writing 1 to that bit, or by a reset.
Configurable Fault Status Register (Byte Access)
SCB_CFSR (BYTE)
Read-write
0x000000000
30
22
14
6
29
21
13
5
28
20
12
4
MMFSR
UFSR
UFSR
BFSR
27
19
11
3
26
18
10
2
25
17
9
1
Section
SAM4S
SAM4S
11.9.1.13.
24
16
8
0
Section
Section
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