AT32UC3B164 Atmel Corporation, AT32UC3B164 Datasheet - Page 246
AT32UC3B164
Manufacturer Part Number
AT32UC3B164
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3B0128.pdf
(684 pages)
5.AT32UC3B0128.pdf
(107 pages)
Specifications of AT32UC3B164
Flash (kbytes)
64 Kbytes
Pin Count
48
Max. Operating Frequency
60 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
28
Ext Interrupts
28
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
1
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
6
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3B164-Z1UT
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3B0128 PDF datasheet #4
- AT32UC3B0128 PDF datasheet #5
- Current page: 246 of 684
- Download datasheet (11Mb)
19.14.1
Name:
Access:
Offset:
Reset Value: 0x00000000
• SWRST: Software Reset
• SVDIS: TWI Slave Mode Disabled
• SVEN: TWI Slave Mode Enabled
• MSDIS: TWI Master Mode Disabled
• MSEN: TWI Master Mode Enabled
• STOP: Send a STOP Condition
• START: Send a START Condition
32059L–AVR32–01/2012
SWRST
31
23
15
–
–
–
7
0 = No effect.
1 = Equivalent to a system reset.
0 = No effect.
1 = The slave mode is disabled. The shifter and holding characters (if it contains data) are transmitted in case of read operation.
In write operation, the character being transferred must be completely received before disabling.
0 = No effect.
1 = If SVDIS = 0, the slave mode is enabled.
Switching from Master to Slave mode is only permitted when TXCOMP = 1.
0 = No effect.
1 = The master mode is disabled, all pending data is transmitted. The shifter and holding characters (if it contains data) are
transmitted in case of write operation. In read operation, the character being transferred must be completely received before
disabling.
0 = No effect.
1 = If MSDIS = 0, the master mode is enabled.
Switching from Slave to Master mode is only permitted when TXCOMP = 1.
0 = No effect.
1 = STOP Condition is sent just after completing the current byte transmission in master read mode.
0 = No effect.
1 = A frame beginning with a START bit is transmitted according to the features defined in the mode register.
- In single data byte master read, the START and STOP must both be set.
- In multiple data bytes master read, the STOP must be set after the last data received but one.
- In master read mode, if a NACK bit is received, the STOP is automatically performed.
- In multiple data write operation, when both THR and shift register are empty, a STOP condition is automatically sent.
Control Register
CR
Write-only
0x00
30
22
14
–
–
–
6
–
SVDIS
29
21
13
–
–
–
5
SVEN
28
20
12
–
–
–
4
MSDIS
27
19
11
–
–
–
3
MSEN
26
18
10
–
–
–
2
STOP
25
17
–
–
9
–
1
START
24
16
–
–
8
–
0
246
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