AT32UC3A3128 Atmel Corporation, AT32UC3A3128 Datasheet - Page 375

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AT32UC3A3128

Manufacturer Part Number
AT32UC3A3128
Description
Manufacturer
Atmel Corporation

Specifications of AT32UC3A3128

Flash (kbytes)
128 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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Table of contents
32000D–04/2011
1
2
3
4
5
6
Feature Summary...................................................................................... 1
Introduction .............................................................................................. 2
Programming Model ................................................................................ 5
Java Extension Module ......................................................................... 27
Secure state ............................................................................................ 31
Memory Management Unit .................................................................... 35
Memory Protection Unit ........................................................................ 51
1.1
1.2
1.3
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10
2.11
2.12
3.1
4.1
4.2
4.3
5.1
5.2
5.3
6.1
6.2
6.3
The AVR family ..................................................................................................2
Microarchitectures .............................................................................................4
Data Formats .....................................................................................................5
Data Organization ..............................................................................................5
Instruction Organization .....................................................................................6
Processor States ...............................................................................................7
Entry and Exit Mechanism .................................................................................8
Register File ......................................................................................................8
The Stack Pointer ............................................................................................10
The Program Counter ......................................................................................11
The Link Register ............................................................................................11
The Status Register .........................................................................................11
System registers ..............................................................................................14
Recommended Call Convention ......................................................................26
The AVR32 Java Virtual Machine ....................................................................27
Mechanisms implementing the Secure State ..................................................31
Secure state programming model ...................................................................32
Details on Secure State implementation .........................................................33
Memory map in systems with MMU .................................................................35
Understanding the MMU ..................................................................................37
Operation of the MMU and MMU exceptions ..................................................47
Memory map in systems with MPU .................................................................51
Understanding the MPU ..................................................................................51
Example of MPU functionality ..........................................................................55
The AVR32 Microprocessor Architecture .........................................................2
AVR32
i

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