AT32UC3A3128 Atmel Corporation, AT32UC3A3128 Datasheet - Page 23

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AT32UC3A3128

Manufacturer Part Number
AT32UC3A3128
Description
Manufacturer
Atmel Corporation

Specifications of AT32UC3A3128

Flash (kbytes)
128 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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32000D–04/2011
Table 2-8.
Table 2-9 on page 23
Table 2-9.
Name
S
D
R
Name
IMMU SZ
DMMU SZ
CONFIG0 Fields (Continued)
CONFIG1 Fields
Bit
2
1
0
Bit
31:26
25:20
shows the CONFIG1 fields.
Description
SIMD instructions implemented
Value
0
1
DSP instructions implemented
Value
0
1
Memory Read-Modify-Write instructions implemented
Value
0
1
Description
The number of entries in the IMMU equals (IMMU SZ) + 1. Not used
in single-MMU or MPU systems.
Specifies the number of entries in the DMMU or in the shared MMU in
single-MMU systems. The number of entries in the DMMU or shared
MMU equals (DMMU SZ + 1). In systems with MPU, DMMU SZ
equals the number of MPUAR entries.
Semantic
No SIMD instructions
SIMD instructions implemented
Semantic
No DSP instructions
DSP instructions implemented
Semantic
No RMW instructions
RMW instructions implemented
AVR32
23

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