T35L6464A-5Q Taiwan Semiconductor Company, Ltd. (TSC), T35L6464A-5Q Datasheet
T35L6464A-5Q
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T35L6464A-5Q Summary of contents
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... Each -8 memory cell consists of four transistors and two high valued resistors. The T35L6464A SRAM integrates 65536 SRAM cells with advanced synchronous peripheral L circuitry and a 2-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered clock input (CLK) ...
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... AMPS ARRAY 8 8 BYTE 4 WRITE DRIVER 8 8 BYTE 3 64 WRITE DRIVER 8 8 BYTE 2 WRITE DRIVER 8 8 BYTE 1 WRITE DRIVER PIPELINED ENABLE 8 T35L6464A controls DQ1-DQ8. BW2 controls DQ17-DQ24. BW3 DQ25-DQ32. BW5 controls BW6 controls DQ41-DQ48. BW8 DQ49-DQ56. controls , , , , BW1 BW2 BW3 BW4 ...
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... This input can be used for memory depth expansion. Synchronous Chip Enable: This active HIGH input is used to enable is loaded. This input can be used for memory depth expansion. Output enable: This active LOW asynchronous input enables the data output drivers T35L6464A controls DQ9- BW2 controls DQ25-DQ32. BW4 controls DQ41-DQ48. ...
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... Fifth Byte is DQ33- DQ40. Sixth Byte is DQ41- DQ48. Seventh Byte is DQ49- DQ56. Eighth Byte is DQ57- DQ64. Input data must meet setup and hold times around the rising edge of CLK. Power Supply: 3.3V +10%/-5%. Ground: GND No Connect: These signals are not internally conntected T35L6464A CE Publication Date: AUG. 1998 Revision: E ...
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... T35L6464A Fourth Address (internal) A...A11 A...A10 A...A01 A...A00 Fourth Address (internal) A...A11 A...A00 A...A01 A...A10 BW4 BW5 BW6 BW7 BW8 ...
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... H means all byte write signal are HIGH. GW WRITE = enables write to DQ9-DQ16. BW2 =enables write to DQ25-DQ32. = enables write to DQ49-DQ56. BW7 must meet setup and hold times around the rising edge ( LOW to HIGH) OE and staying HIGH throughout the input data hold T35L6464A CLK L L-H X ...
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... 8.0 mA Supply Voltage Taiwan Memory Technology, Inc. reserves the right to change products or specifications without notice. T35L6464A *Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any ...
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... I SB3 SB4 30 81 SYM. TYP VCC = 3.3V 6 CONDITIONS SYM. QFP TYP UNITS Still air, soldered on JA 4.25x 1.125 inch 4-layer PCB T35L6464A UNITS NOTES 260 240 210 12, 13 ...
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... P. 9 T35L6464A - 8,10 0.5 ns 8,10 0.5 ns 8,10 0.5 ns 8,10 ...
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... C and = 20ns cycle time. L 14.MODE pin has an internal pull-up and exhibits an input leakage current =1.5V 3.3V DQ 351 P. 10 T35L6464A HIGH for the ADSP LOW) or LOW for ADV ADSP 317 5 pF Publication Date: AUG. 1998 Revision: E ...
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... SYMBOL MIN KC) t RZZ Vss + 0 Vcc -0.2 V T35L6464A is guaranteed after the setup time Z Z MAX UNITS NOTES KC DON'T CARE Publication Date: AUG ...
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... ( Q (NOT this diagram, when T35L6464A urs tinue d w ith new Des elec le its inita ...
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... D(A2) D(A2+1) D(A2+1) D(A2+2) (NOT this diagram, when CE CE2 CE3 is HIGH T35L6464A D(A2+3) D(A3) D(A3+1) D(A3+2) Exte WRIT E DON 'T CAR E UND CE2 is LOW, ...
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... -throu this diagram, when CE is HIGH ADSP P. 14 T35L6464A (A5) D (A6) Q(A 4 k-to WRIT ARE UN DEF INED ...
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... Taiwan Memory Technology, Inc. reserves the right to change products or specifications without notice. y DIMENTION IN MM 3.400(MAX) 2.720+0.180-0.220 0.250(MIN) 0.200+0.070-0.030 14.000 20.000 0.500 17.200 23.200 0.880±0.150 1.600 ± 0.150 0.150+0.080-0.040 0.080 0 ~7 P.15 T35L6464A Publication Date: AUG. 1998 Revision: E ...
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... Taiwan Memory Technology, Inc. reserves the right to change products or specifications without notice. y DIMENTION IN MM 1.600(MAX) 1.400±0.050 0.050(MIN) 0.200+0.070-0.030 14.000 20.000 0.500 16.000 22.000 0.600±0.150 1.000 0.090(MIN),0.200(MAX) 0.080 0 ~7 P.16 T35L6464A Publication Date: AUG. 1998 Revision: E ...