ISPLSI2064E-100LT100 Lattice Semiconductor Corp., ISPLSI2064E-100LT100 Datasheet
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ISPLSI2064E-100LT100
Specifications of ISPLSI2064E-100LT100
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ISPLSI2064E-100LT100 Summary of contents
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... Optimized Global Routing Pool Provides Global Interconnectivity Copyright © 2002 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A. ...
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Functional Block Diagram Figure 1. ispLSI 2064E Functional Block Diagram Megablock I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 I/O 8 I/O 9 I/O 10 I/O 11 I/O 12 I/O 13 I/O ...
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Absolute Maximum Ratings Supply Voltage V cc ................................................... Input Voltage Applied .............................. -2 Off-State Output Voltage Applied ........... -2 Storage Temperature ..................................... -65 to 150°C Case Temp. with Power Applied .................... -55 to 125°C Max. Junction ...
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Switching Test Conditions Input Pulse Levels Input Rise and Fall Time 10% to 90% Input Timing Reference Levels Output Timing Reference Levels Output Load 3-state levels are measured 0.5V from steady-state active level. Output Load Conditions (see Figure 2) TEST ...
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External Timing Parameters TEST 2 PARAMETER # 4 COND Data Prop Delay, 4PT Bypass, ORP Bypass pd1 t pd2 A 2 Data Prop Delay Clk Freq with Internal Feedback max f – 4 Clk ...
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Internal Timing Parameters 2 PARAMETER # Inputs t 20 Input Buffer Delay Dedicated Input Delay din GRP t 22 GRP Delay grp GLB t 4ptbpc 23 4 Product Term Bypass Path Delay (Combinatorial Product ...
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Timing Model I/O Cell Ded. In #21 I/O Delay I/O Pin #20 (Input) #45 Reset Y0,1,2 GOE 0 Derivations of su, h and co from the Product Term Clock Logic + Reg ...
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Power Consumption Power consumption in the ispLSI 2064E device depends on two primary factors: the speed at which the device is operating and the number of Product Terms used. Figure 3. Typical Device Power Consumption vs fmax 160 150 140 ...
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Pin Description NAME TQFP PIN NUMBERS I I/O 3 17, 18, I I/O 7 21, 22, I I/O 11 29, 30, I I/O 15 33, 34, I I/O 19 40, ...
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Pin Configuration ispLSI 2064E 100-Pin TQFP Pinout Diagram VCCIO 1 GND VCC 12 ...
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Part Number Description ispLSI 2064E Device Family Device Number Speed f 200 = 200 MHz max f 135 = 135 MHz max f 100 = 100 MHz max ispLSI 2064E Ordering Information FAMILY fmax (MHz) tpd (ns) 200 ispLSI 135 ...