GAL16V8D-5LJ Lattice Semiconductor Corp., GAL16V8D-5LJ Datasheet
GAL16V8D-5LJ
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GAL16V8D-5LJ Summary of contents
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... GAL products. In addition, 100 erase/write cycles and data retention in excess of 20 years are specified. Copyright © 2006 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. ...
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GAL16V8 Ordering Information Conventional Packaging Commercial Grade Specifications ...
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... Part Number Description GAL16V8D Device Name Speed (ns Low Power Power Q = Quarter Power ...
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Output Logic Macrocell (OLMC) The following discussion pertains to configuring the output logic macrocell. It should be noted that actual implementation is accom- plished by development software/hardware and is completely trans- parent to the user. There are three global OLMC ...
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Registered Mode In the Registered mode, macrocells are configured as dedicated registered outputs or as I/O functions. Architecture configurations available in this mode are similar to the common 16R8 and 16RP4 devices with various permutations of polarity, I/O and register ...
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Registered Mode Logic Diagram 1 0000 0224 2 0256 0480 3 0512 0736 4 0768 0992 5 1024 1248 6 1280 1504 7 1536 1760 8 1792 2016 9 DIP & PLCC Package Pinouts 2128 28 PTD ...
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Complex Mode In the Complex mode, macrocells are configured as output only or I/O functions. Architecture configurations available in this mode are similar to the common 16L8 and 16P8 devices with programmable polarity in each macrocell six I/O's ...
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Complex Mode Logic Diagram 1 0000 0224 2 0256 0480 3 0512 0736 4 0768 0992 5 1024 1248 6 1280 1504 7 1536 1760 8 1792 2016 9 DIP & PLCC Package Pinouts 2128 ...
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Simple Mode In the Simple mode, macrocells are configured as dedicated inputs or as dedicated, always active, combinatorial outputs. Architecture configurations available in this mode are similar to the common 10L8 and 12P6 devices with many permutations of ge- neric ...
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Simple Mode Logic Diagram 1 0000 0224 2 0256 0480 3 0512 0736 4 0768 0992 5 1024 1248 6 1280 1504 7 1536 1760 8 1792 2016 9 DIP & PLCC Package Pinouts 2128 ...
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... IL L-3/-5 & -7 (Ind. PLCC) L-7 (Except Ind. PLCC)/-10/-15/-25 Q-10/-15/-20/- 0. OUT = 0. 3. 15MHz Outputs Open = 0. 3. 15MHz Outputs Open = 25 ° Specifications GAL16V8D ) ............................... 0 to 75° ........................... –40 to 85° MIN. TYP. — Vss – 0.5 2.0 — — — — — — — ...
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... Characterized but not 100% tested. ° Capacitance ( 1.0 MHz) A SYMBOL PARAMETER C Input Capacitance I C I/O Capacitance I/O *Characterized but not 100% tested. Specifications GAL16V8D Over Recommended Operating Conditions MAXIMUM* UNITS COM COM / IND COM - MIN. MAX. MIN. MAX. MIN. MAX. ...
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... Calculated from fmax with internal feedback. Refer to fmax Descriptions section. 3) Refer to fmax Descriptions section. Characterized but not 100% tested. ° Capacitance ( 1.0 MHz) A SYMBOL PARAMETER C Input Capacitance I C I/O Capacitance I/O *Characterized but not 100% tested. Specifications GAL16V8D Over Recommended Operating Conditions COM / IND -10 MIN. MAX — 7.5 — 0 — 66.7 — ...
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Switching Waveforms INPUT or I/O FEEDBACK COMBINATIONAL OUTPUT Combinatorial Output INPUT or I/O FEEDBACK t dis COMBINATIONAL OUTPUT Input or I/O to Output Enable/Disable t wh CLK f 1/ max (w/o fb) Clock Width INPUT or I/O FEEDBACK CLK VALID ...
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... Input Rise and Fall Times GAL16V8D-3/-5/-7 Input Timing Reference Levels Output Timing Reference Levels Output Load 3-state levels are measured 0.5V from steady-state active level. GAL16V8D (except -3) Output Load Conditions (see figure above) Test Condition 200Ω B Active High ∞ ...
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... Switching Test Conditions (Continued) GAL16V8D-3 Output Load Conditions (see figure at right) Test Condition A B High Z to Active High at 1.9V High Z to Active Low at 1.0V C Active High to High Z at 1.9V Active Low to High Z at 1.0V Electronic Signature An electronic signature is provided in every GAL16V8 device. It contains 64 bits of reprogrammable memory that can contain user defined data ...
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Power-Up Reset INTERNAL REGISTER Q - OUTPUT FEEDBACK/EXTERNAL OUTPUT REGISTER Circuitry within the GAL16V8 provides a reset signal to all reg- isters during power-up. All internal registers will have their Q t outputs set low after a specified time ( ...
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... GAL16V8D-3/-5/-7 (IND PLCC): Typical AC and DC Characteristic Diagrams N ormalized Tpd vs Vcc 1.2 PT H->L 1.1 PT L->H 1 0.9 0.8 4.50 4.75 5.00 5.25 5.50 Supply Voltage (V) Normalized Tpd vs Temp 1.3 1.2 PT H->L PT L->H 1.1 1 0.9 0.8 0.7 -55 - 100 125 Temperature (deg. C) Delta Tpd Outputs 0 -0.1 -0.2 -0.3 -0 Number of Outputs Switching Delta Tpd vs Output Loading RISE 1 0 FALL ...
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... GAL16V8D-3/-5/-7 (IND PLCC): Typical AC and DC Characteristic Diagrams Vol vs Iol 1 0.75 0.5 0. Iol (mA) Normalized Icc vs Vcc 1.2 1.1 1 0.9 0.8 4.50 4.75 5.00 5.25 5.50 Supply Voltage (V) Delta Icc vs Vin (1 input 0.5 1 1.5 2 2.5 3 3.5 Vin (V) Voh vs Ioh Ioh (mA) Normalized Icc vs Temp 1 ...
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... GAL16V8D-7 (Except IND PLCC)/-10L: Typical AC and DC Characteristic Diagrams Normalized Tpd vs Vcc 1.15 1.1 RISE FALL 1.05 1 0.95 0.9 4.5 4.75 5 5.25 5.5 Supply Voltage (V) Normalized Tpd vs Temp 1.3 RISE 1.2 FALL 1.1 1 0.9 0.8 -55 - 100 125 Temperature (deg. C) Delta Tpd Outputs Switching 0 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0 Number of Outputs Switching Delta Tpd vs Output Loading ...
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... GAL16V8D-7 (Except IND PLCC)/-10L: Typical AC and DC Characteristic Diagrams Vol vs Iol 0.5 0.4 0.3 0.2 0 Iol (mA) Normalized Icc vs Vcc 1.1 1 0.9 0.8 3 3.15 3.3 3.45 Supply Voltage (V) Delta Icc vs Vin (1 input 0.5 1 1.5 2 2.5 3 3.5 4 4.5 Vin (V) Voh vs Ioh ...
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... GAL16V8D-10Q (and Slower): Typical AC and DC Characteristic Diagrams Normalized Tpd vs Vcc 1.2 PT H->L 1.1 PT L->H 1 0.9 0.8 4.50 4.75 5.00 5.25 5.50 Supply Voltage (V) Normalized Tpd vs Temp 1.3 1.2 PT H->L PT L->H 1.1 1 0.9 0.8 0.7 -55 - 100 125 Temperature (deg. C) Delta Tpd Outputs 0 -0.2 -0.4 -0.6 -0 Number of Outputs Switching Delta Tpd vs Output Loading 12 10 RISE 8 FALL ...
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... GAL16V8D-10Q (and Slower): Typical AC and DC Characteristic Diagrams Vol vs Iol 0.6 0.4 0 Iol (mA) Normalized Icc vs Vcc 1.2 1.1 1 0.9 0.8 4.50 4.75 5.00 5.25 Supply Voltage (V) Delta Icc vs Vin (1 input 0.5 1 1.5 2 2.5 3 3.5 Vin (V) Voh vs Ioh Ioh (mA) Normalized Icc vs Temp 1.3 1.2 1.1 1 0.9 0.8 0.7 5.50 -55 - ...
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Revision History Date Version - 16v8_10 August 2006 16v8_11 Specifications GAL16V8 Change Summary Previous Lattice release. Updated for lead-free package options. 24 ...