UCN5822A Allegro Micro Systems, Inc., UCN5822A Datasheet

UCN5822A

Manufacturer Part Number

UCN5822A

Description

BiMOS II 8-Bit serial-input, latched driver

Manufacturer

Allegro Micro Systems, Inc.

Datasheet

1.UCN5822A.pdf (8 pages)

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DATA OUT

GROUND

Output Voltage, V

Logic Supply Voltage, V

Input Voltage Range,

Continuous Output Current,

Package Power Dissipation, P

Operating Temperature Range,

Storage Temperature Range,

Caution: CMOS devices have input static protection

but are susceptible to damage when exposed to

extremely high static electrical charges.

OUTPUT

STROBE

ENABLE

DATA IN

SUPPLY

www.allegromicro.com

Note the DIP package and the SOIC package are

electrically identical and share common terminal

number assignments.

POWER

SERIAL

CLOCK

LOGIC

UCN5821A & UCN5821LW ..... 50 V

UCN5822A & UCN5822LW ..... 80 V

Package Code ‘A’ .................. 2.1 W

Package Code ‘LW’ ............... 1.5 W

OUT

............................ -20

.......................... -55

.................. -0.3 V to V

..................................... 500 mA

CLK

SUB

OUT

............. 15 V

C to +150

C to +85

+ 0.3 V

Dwg. PP-026A

OUT

5821

5822

Always order by complete part number, e.g., UCN5821A .

these devices an interface flexibility beyond the reach of standard

logic buffers and power driver arrays. The UCN5821A,

UCN5821LW, UCN5822A, and UCN5822LW each have an

eight-bit CMOS shift register and CMOS control circuitry, eight

CMOS data latches, and eight bipolar current-sinking Darlington

output drivers. The UCN5821A/LW and UCN5822A/LW are

identical except for rated output voltage.

original BiMOS circuits. With a 5 V logic supply, they will

typically operate at better than 5 MHz. With a 12 V supply,

significantly higher speeds are obtained. The CMOS inputs are

compatible with standard CMOS and NMOS logic levels. TTL

circuits may require the use of appropriate pull-up resistors. By

using the serial data output, the drivers can be cascaded for

interface applications requiring additional drive lines.

DIP; the UCN5821/22LW are in a 16-lead wide-body SOIC for

surface-mount applications. The UCN5821A is also available for

operation from -40°C to +85°C. To order, change the prefix from

‘UCN’ to ‘UCQ’.

FEATURES

I To 3.3 MHz Data Input Rate

I CMOS, NMOS, TTL Compatible

I Internal Pull-Down Resistors

I Low-Power CMOS Logic & Latches

I High-Voltage Current-Sink Outputs

I Automotive Capable

A merged combination of bipolar and MOS technology gives

BiMOS II devices have much higher data-input rates than the

The UCN5821/22A are furnished in a standard 16-pin plastic

BiMOS II 8-BIT SERIAL-INPUT,

AND

LATCHED DRIVERS

Related parts for UCN5822A

UCN5822A Summary of contents

Page 1

... OUT eight-bit CMOS shift register and CMOS control circuitry, eight 2 CMOS data latches, and eight bipolar current-sinking Darlington OUT 14 3 output drivers. The UCN5821A/LW and UCN5822A/LW are 13 OUT identical except for rated output voltage OUT 5 BiMOS II devices have much higher data-input rates than the original BiMOS circuits ...

Page 2

AND 8-BIT SERIAL-INPUT, LATCHED DRIVERS IN STROBE & OUTPUT ENABLE Dwg. EP-010-3 CLOCK & SERIAL DATA IN IN Dwg. EP-010-4A 7.2K 3K SUB Dwg. No. A-14,314 V DD CLOCK 1 SERIAL 2 DATA IN LOGIC 3 GROUND 16 ...

Page 3

... Saturation Voltage Input Voltage V IN(0) V IN(1) Input Resistance r IN Supply Current I DD(ON) I DD(OFF) www.allegromicro.com ° (unless otherwise specified Test Conditions UCN5821A/LW OUT UCN5822A/LW OUT UCN5821A/LW +70°C OUT A UCN5822A/LW +70°C OUT 100 mA OUT I = 200 mA OUT I = 350 mA 7.0 V OUT 5 5 One Driver ON One Driver ON ...

Page 4

AND 8-BIT SERIAL-INPUT, LATCHED DRIVERS CLOCK DATA STROBE OUTPUT ENABLE OUT N TIMING CONDITIONS ° 5 +25 C, Logic Levels are Minimum ...

Page 5

MAX 0.015 MIN 0.022 0.014 16 7.11 6.10 1 1.77 1.15 5.33 MAX 0.39 MIN 0.558 0.356 NOTES: 1. Lead thickness is measured at seating plane or below. 2. Lead spacing tolerance is ...

Page 6

AND 8-BIT SERIAL-INPUT, LATCHED DRIVERS 0.2992 0.2914 0.020 0.013 0.0926 0.1043 0.0040 16 7.60 7.40 0.51 0.33 2.65 2.35 NOTES: 1. Lead spacing tolerance is non-cumulative. 2. Exact body and lead configuration at vendor’s option within limits shown. ...

Page 7

SERIAL-INPUT, LATCHED DRIVERS The products described here are manufactured under one or more U.S. patents or U.S. patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications ...

Page 8

AND 8-BIT SERIAL-INPUT, LATCHED DRIVERS * Current is maximum specified test condition, voltage is maximum rating. See specification for sustaining voltage limits. Negative current is defined as coming out of (sourcing) the output. † Complete part number includes ...

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