HD6473837FV Renesas Electronics America, HD6473837FV Datasheet - Page 296
HD6473837FV
Manufacturer Part Number
HD6473837FV
Description
IC H8/3837 MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet
1.HD6473837HV.pdf
(562 pages)
Specifications of HD6473837FV
Core Processor
H8/300L
Core Size
8-Bit
Speed
5MHz
Connectivity
SCI
Peripherals
LCD, PWM
Number Of I /o
84
Program Memory Size
60KB (60K x 8)
Program Memory Type
OTP
Eeprom Size
-
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-BQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6473837FV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6473837FV
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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Transmit/Receive Format
Figure 10.16 shows the general communication data format for synchronous communication.
In synchronous communication, data on the communication line is output from one falling edge of
the serial clock until the next falling edge. Data is guaranteed valid at the rising edge of the serial
clock.
One character of data starts from the LSB and ends with the MSB. The communication line retains
the MSB state after the MSB is output.
In synchronous receive mode, SCI3 latches receive data in synchronization with the rising edge of
the serial clock.
The transmit/receive format is fixed at 8-bit data. No parity bit or multiprocessor bit is added in
this mode.
Clock
Either an internal clock from the built-in baud rate generator is used, or an external clock is input
at pin SCK
CKE0 in serial control register 3 (SCR3). See table 10.14 for details on selecting the clock source.
When operation is based on an internal clock, a serial clock is output at pin SCK
pulses are output per character of transmit/receive data. When no transmit or receive operation is
being performed, the pin is held at the high level.
Serial clock
Serial data
Note: * At high level except during continuous transmit/receive.
3
. The choice of clock sources is designated by bit COM in SMR and bits CKE1 and
Don't
*
Figure 10.16 Data Format in Synchronous Communication Mode
care
Bit 0
LSB
One unit of communication data (character or frame)
Bit 1
Bit 2
Bit 3
8 bits
Bit 4
Bit 5
Bit 6
3
. Eight clock
MSB
Bit 7
*
Don't
care
279
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