LFXP15E-4FN388C Lattice, LFXP15E-4FN388C Datasheet - Page 2
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LFXP15E-4FN388C
Manufacturer Part Number
LFXP15E-4FN388C
Description
IC FPGA 15.4KLUTS 388FPBGA
Manufacturer
Lattice
Datasheet
1.LFXP6C-3TN144C.pdf
(130 pages)
Specifications of LFXP15E-4FN388C
Number Of Logic Elements/cells
*
Number Of Labs/clbs
*
Total Ram Bits
*
Number Of I /o
*
Number Of Gates
*
Voltage - Supply
*
Mounting Type
*
Operating Temperature
*
Package / Case
*
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFXP15E-4FN388C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
www.latticesemi.com
© 2005 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
July 2007
Features
■ Non-volatile, Infinitely Reconfigurable
■ Sleep Mode
■ TransFR™ Reconfiguration (TFR)
■ Extensive Density and Package Options
■ Embedded and Distributed Memory
Table 1-1. LatticeXP Family Selection Guide
PFU/PFF Rows
PFU/PFF Columns
PFU/PFF (Total)
LUTs (K)
Distributed RAM (KBits)
EBR SRAM (KBits)
EBR SRAM Blocks
V
PLLs
Max. I/O
Packages and I/O Combinations:
100-pin TQFP (14 x 14 mm)
144-pin TQFP (20 x 20 mm)
208-pin PQFP (28 x 28 mm)
256-ball fpBGA (17 x 17 mm)
388-ball fpBGA (23 x 23 mm)
484-ball fpBGA (23 x 23 mm)
CC
Voltage
• Instant-on – powers up in microseconds
• No external configuration memory
• Excellent design security, no bit stream to
• Reconfigure SRAM based logic in milliseconds
• SRAM and non-volatile memory programmable
• Allows up to 1000x static current reduction
• In-field logic update while system operates
• 3.1K to 19.7K LUT4s
• 62 to 340 I/Os
• Density migration supported
• 54 Kbits to 396 Kbits sysMEM™ Embedded
• Up to 79 Kbits distributed RAM
• Flexible memory resources:
intercept
through system configuration and JTAG ports
Block RAM
− Distributed and block memory
Device
1.2/1.8/2.5/3.3V
LFXP3
384
136
100
136
16
24
12
54
62
3
6
2
1.2/1.8/2.5/3.3V
LFXP6
720
188
100
142
188
24
30
23
72
LatticeXP Family Data Sheet
6
8
2
1-1
■ Flexible I/O Buffer
■ Dedicated DDR Memory Support
■ sysCLOCK™ PLLs
■ System Level Support
• Programmable sysIO™ buffer supports wide
• Implements interface up to DDR333 (166MHz)
• Up to 4 analog PLLs per device
• Clock multiply, divide and phase shifting
• IEEE Standard 1149.1 Boundary Scan, plus
• Onboard oscillator for configuration
• Devices operate with 3.3V, 2.5V, 1.8V or 1.2V
1.2/1.8/2.5/3.3V
range of interfaces:
ispTRACY™ internal logic analyzer capability
power supply
− LVCMOS 3.3/2.5/1.8/1.5/1.2
− LVTTL
– SSTL 18 Class I
− SSTL 3/2 Class I, II
– HSTL15 Class I, III
− HSTL 18 Class I, II, III
− PCI
− LVDS, Bus-LVDS, LVPECL, RSDS
LFXP10
DS1001 Introduction_01.5a July 6, 2007 3:01 p.m.
1216
216
244
188
244
32
38
10
39
24
4
1.2/1.8/2.5/3.3V
LFXP15
1932
324
300
188
268
300
40
48
15
61
36
Introduction
4
Data Sheet DS1001
1.2/1.8/2.5/3.3V
LFXP20
2464
396
340
188
268
340
44
56
20
79
44
4