N28F001BXT150 Intel, N28F001BXT150 Datasheet - Page 16

• Manufacturer Part Number: N28F001BXT150
• Manufacturer: Intel

Specifications of N28F001BXT150

• Density: 1Mb
• Access Time (max): 150ns
• Interface Type: Parallel
• Boot Type: Top
• Address Bus: 17b
• Operating Supply Voltage (typ): 5V
• Operating Temp Range: 0C to 70C
• Package Type: PLCC
• Program/erase Volt (typ): 11.4 to 12.6V
• Sync/async: Asynchronous
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Word Size: 8b
• Number Of Words: 128K
• Supply Current: 30mA
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / Rohs Status: Not Compliant

28F001BX
At this point, a Read Array command can be written
to the command register to read data from blocks
other than that which is suspended. The only
other valid commands at this time are Read Status
Register (70H) and Erase Resume (D0H), at which
time the WSM will continue with the erase
16
SR.2–SR.0 = RESERVED FOR FUTURE
ENHANCEMENTS
SR.7
SR.6
SR.5
SR.4
SR.3
1
0
1
0
1
0
1
0
1
0
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
WSMS
WRITE STATE MACHINE STATUS
Ready
Busy
ERASE SUSPEND STATUS
Erase Suspended
Erase in Progress/Completed
ERASE STATUS
Error in Block Erasure
Successful Block Erase
PROGRAM STATUS
Error in Byte Program
Successful Byte Program
V
V
V
7
PP
PP
PP
STATUS
Low Detect; Operation Abort
OK
ESS
6
Table 4. 28F001BX Status Register Definitions
ES
5
PS
4
NOTES:
The WSM status bit must first be checked to
determine program or erase completion, before the
program or erase status bits are checked for success.
If the program and erase status bits are set to “1s”
during an erase attempt, an improper command
sequence was entered. Attempt the operation again.
If V
be cleared before another program or erase operation
is attempted.
The V
provide continuous indication of V
interrogates the V
Erase command sequences have been entered and
informs the system if V
The V
accurate feedback between V
These bits are reserved for future use and should be
masked out when polling the status register.
VPPS
sequence. The erase suspend status and WSM
status bits of the status register will be cleared.
After the Erase Resume command is written to it,
the 28F001BX automatically outputs status register
data when read (see Figure 10, 28F001BX Erase
Suspend/ Resume Flowchart ).
PP
3
PP
PP
low status is detected, the status register must
status bit, unlike an A/D converter, does not
status bit is not guaranteed to report
R
2
PP
level only after the Program or
PP
has not been switched on.
R
1
PPL
and V
PP
level. The WSM
R
0
PPH
.