N28F001BXT150 Intel, N28F001BXT150 Datasheet - Page 13

• Manufacturer Part Number: N28F001BXT150
• Manufacturer: Intel

Specifications of N28F001BXT150

• Density: 1Mb
• Access Time (max): 150ns
• Interface Type: Parallel
• Boot Type: Top
• Address Bus: 17b
• Operating Supply Voltage (typ): 5V
• Operating Temp Range: 0C to 70C
• Package Type: PLCC
• Program/erase Volt (typ): 11.4 to 12.6V
• Sync/async: Asynchronous
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Word Size: 8b
• Number Of Words: 128K
• Supply Current: 30mA
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / Rohs Status: Not Compliant

3.4
The 28F001BX offers a 0.25 µW V
feature, entered when RP# is at V
modes, RP# low deselects the memory, places
output drivers in a high-impedance state and turns
off all internal circuits. The 28F001BX requires time
t
Operations ) after return from power-down until initial
memory access outputs are valid. After this wakeup
interval,
command register is reset to read array, and the
status register is cleared to value 80H, upon return
to normal operation.
During erase or program modes, RP# low will abort
either operation. Memory contents of the block
being altered are no longer valid as the data will be
partially programmed or erased. Time t
RP# goes to logic-high (V
another command can be written.
3.5
The intelligent identifier operation outputs the
manufacturer code, 89H; and the device code, 94H
for the 28F001BX-T and 95H for the 28F001BX-B.
Programming equipment or the system CPU can
then automatically match the device with its proper
erase and programming algorithms.
3.5.1
CE# and OE# at a logic low level (V
high voltage V
this operation. Data read from locations 00000H
and 00001H represent the manufacturer’s code and
the device code respectively.
3.5.2
The manufacturer and device codes can also be
read via the command register. Following a write of
90H to the command register, a read from address
location 00000H outputs the manufacturer code
(89H). A read from address 00001H outputs the
device code (94H for the 28F001BX-T and 95H for
the 28F001BX-B). It is not necessary to have high
voltage applied to V
identifiers from the command register.
PHQV
(see
Deep Power-Down
Intelligent Identifier Operation
normal
PROGRAMMING EQUIPMENT
IN-SYSTEM PROGRAMMING
ID
AC
(see DC Characteristics ) activates
operation
PP
Characteristics—Read-Only
to read the intelligent
IH
) is required before
is
CC
restored.
IL
IL
. During read
), with A
power-down
PHWL
after
The
9
at
3.6
Writes to the command register allow read of device
data and intelligent identifiers. They also control
inspection and clearing of the status register.
Additionally, when V
register controls device erasure and programming.
The contents of the register serve as input to the
internal state machine.
The command register itself does not occupy an
addressable memory location. The register is a
latch used to store the command and address and
data information needed to execute the command.
Erase Setup and Erase Confirm commands require
both appropriate command data and an address
within the block to be erased. The Program Setup
command requires both appropriate command data
and the address of the location to be programmed,
while the Program command consists of the data to
be written and the address of the location to be
programmed.
The command register is written by bringing WE# to
a logic-low level (V
and data are latched on the rising edge of WE#.
Standard microprocessor write timings are used.
Refer to AC Characteristics—Write/Erase/Program
Operations and the AC Waveform for Write
Operations ,
parameters.
4.0 COMMAND DEFINITIONS
When V
operations from the status register, intelligent
identifiers, or array blocks are enabled. Placing
V
operations as well.
Device operations are selected by writing specific
commands into the command register. Table 3
defines these 28F001BX commands.
4.1
Upon initial device power-up and after exit from
deep power-down mode, the 28F001BX defaults to
read array mode. This operation is also initiated by
writing
PPH
on V
PPL
Write
Read Array Command
FFH
PP
enables successful program and erase
Figure
is applied to the V
into
IL
) while CE# is low. Addresses
PP
19,
the
= V
for
command
PPH
, the command
specific
PP
28F001BX
pin, read
register.
timing
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