ISL43410IRZ-T Intersil, ISL43410IRZ-T Datasheet
ISL43410IRZ-T
Specifications of ISL43410IRZ-T
Related parts for ISL43410IRZ-T
ISL43410IRZ-T Summary of contents
Page 1
... CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 Copyright Intersil Americas Inc. 2003, 2004, 2006, 2008. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL43410 FN6044 100Ω .<3µ 5V 30ns | Intersil (and design registered trademark of Intersil Americas Inc. ...
Page 2
... ISL43410IUZ-T* (Note) ISL43410IR ISL43410IR-T* ISL43410IRZ (Note) ISL43410IRZ-T* (Note) *Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...
Page 3
... Maximum Junction Temperature (Plastic Package +150°C Moisture Sensitivity (See Technical Brief TB363) All Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1 Maximum Storage Temperature Range . . . . . . . . . . . -65°C to +150°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Test Conditions +4.5V to +5.5V, GND = 0V, V Otherwise Specified. TEST CONDITIONS = 1.0mA ...
Page 4
Electrical Specifications +5V Supply PARAMETER Inhibit Turn-OFF Time 4.5V, V OFF (See Figure 1) IN Address Transition Time 4.5V, V TRANS (See Figure 1) ...
Page 5
Electrical Specifications +3V Supply PARAMETER DYNAMIC CHARACTERISTICS Inhibit Turn-ON Time 2.7V (see Figure 1) IN Inhibit Turn-OFF Time 2.7V, V OFF (see ...
Page 6
Electrical Specifications + 12V Supply PARAMETER DYNAMIC CHARACTERISTICS Inhibit Turn-ON Time 10.8V (see Figure 1) IN Inhibit Turn-OFF Time 10.8V, V OFF ...
Page 7
Test Circuits and Waveforms 3V LOGIC 50% INPUT 0V t TRANS 90% SWITCH OUTPUT 0V t TRANS Logic input waveform is inverted for switches that have the opposite logic sense. FIGURE 1C. ADDRESS MEASUREMENT POINTS OFF LOGIC ON INPUT SWITCH ...
Page 8
Test Circuits and Waveforms SIGNAL GENERATOR COM ANALYZER GND R L FIGURE 4. OFF-ISOLATION TEST CIRCUIT SIGNAL GENERATOR NO1 OR NC1 ADD NO2 OR NC2 COM2 ANALYZER GND R L FIGURE 6. CROSSTALK TEST ...
Page 9
OPTIONAL PROTECTION RESISTOR OPTIONAL PROTECTION DIODE FOR LOGIC INPUTS 1kΩ V+ ADD 1kΩ GND OPTIONAL PROTECTION DIODE FIGURE 8. OVERVOLTAGE PROTECTION Power-Supply Considerations The ISL43410 construction is typical of most CMOS analog switches, except ...
Page 10
Typical Performance Curves 500 400 300 +85°C 200 +25°C 100 -40° (V) FIGURE 9. ON-RESISTANCE vs SUPPLY VOLTAGE 3.0 V INH 2.5 2.0 +25°C 1.5 1.0 0.5 3.0 V INL 2.5 ...
Page 11
Typical Performance Curves 350 300 250 200 +85°C 150 +25°C 100 -40° (V) FIGURE 15. ADDRESS TRANS TIME vs SUPPLY VOLTAGE V = 0.2V (V+ = 3V ...
Page 12
Package Outline Drawing L16.3x3 16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 2, 4/07 3.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( 2. 80 TYP ) ( TYPICAL RECOMMENDED LAND PATTERN 12 ISL43410 A ...
Page 13
... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...