PI7C8150ANDE Pericom Semiconductor, PI7C8150ANDE Datasheet - Page 75
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PI7C8150ANDE
Manufacturer Part Number
PI7C8150ANDE
Description
IC PCI-PCI BRIDGE 2PORT 256-PBGA
Manufacturer
Pericom Semiconductor
Datasheet
1.PI7C8150ANDE.pdf
(111 pages)
Specifications of PI7C8150ANDE
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
256-PBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
06-0057
P_CBE [3:0]
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
Command
Special Cycle
I/O Read
I/O Write
Reserved
Reserved
Memory Read
Memory Write
Reserved
Reserved
Configuration Read
Configuration Write
Memory Read
Multiple
Dual Address Cycle
Memory Read Line
Page 75 of 111
Action
Do not claim. Ignore.
1. If address is within pass through I/O range, claim and pass
through.
2. Otherwise, do not pass through and do not claim for
internal access.
Same as I/O Read.
-----
-----
1. If address is within pass through memory range, claim and
pass through.
2. If address is within pass through memory mapped I/O
range, claim and pass through.
3. Otherwise, do not pass through and do not claim for
internal access.
Same as Memory Read.
-----
-----
Type 0 Configuration Read:
If the bridge’s IDSEL line is asserted, perform function
decode and claim if target function is implemented.
Otherwise, ignore. If claimed, permit access to target
function’s configuration registers. Do not pass through
under any circumstances.
Type 1 Configuration Read:
1. If the target bus is the bridge’s secondary bus: claim and
pass through as a Type 0 Configuration Read.
2. If the target bus is a subordinate bus that exists behind the
bridge (but not equal to the secondary bus): claim and pass
through as a Type 1 Configuration Read.
3. Otherwise, ignore.
Type 0 Configuration Write: same as Configuration
Read.
Type 1 Configuration Write (not special cycle request):
1. If the target bus is the bridge’s secondary bus: claim and
pass through as a Type 0 Configuration Write
2. If the target bus is a subordinate bus that exists behind the
bridge (but not equal to the secondary bus): claim and pass
through unchanged as a Type 1 Configuration Write.
3. Otherwise, ignore.
Configuration Write as Special Cycle Request
(device = 1Fh, function = 7h)
1. If the target bus is the bridges secondary bus:
claim and pass through as a special cycle.
2. If the target bus is a subordinate bus that exists
behind the bridge (but not equal to the secondary
bus): claim and pass through unchanged as a type
1 Configuration Write.
3. Otherwise ignore
Same as Memory Read
Supported
Same as Memory Read
2-PORT PCI-TO-PCI BRIDGE
APRIL 2006 – Revision 1.1
PI7C8150A