NJU3715G NJR, NJU3715G Datasheet - Page 3

no-image

NJU3715G

Manufacturer Part Number
NJU3715G
Description
IC SRL/PARALLEL CONV 16BIT 22SOP
Manufacturer
NJR
Datasheet

Specifications of NJU3715G

Function
Serial to Parallel
Input Type
Serial
Output Type
Parallel
Number Of Inputs
4
Number Of Outputs
16
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-25°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
22-SOP
Output Voltage
2.4 V to 5.5 V
Mounting Style
SMD/SMT
Operating Temperature Range
- 25 C to + 85 C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Rate
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NJU3715G
Manufacturer:
AVS
Quantity:
170
Part Number:
NJU3715G
Manufacturer:
JRC
Quantity:
20 000
Part Number:
NJU3715G(TE1)
Manufacturer:
JRC
Quantity:
20 000
Part Number:
NJU3715G-TE1
Manufacturer:
ALLIANCE
Quantity:
20
Part Number:
NJU3715G-TE1
Manufacturer:
JRC
Quantity:
20 000
Part Number:
NJU3715G-TE2
Manufacturer:
ALLIANCE
Quantity:
63
Part Number:
NJU3715G-TE2
Manufacturer:
JRC
Quantity:
2 000
Part Number:
NJU3715G-TE2
Manufacturer:
JRC
Quantity:
20 000
(1) Reset
(2) Data Transmission
Ver.2010-11-29
Note 1)
FUNCTIONAL DESCRIPTION
output are "L" level.
into the DATA terminal are shifted in the shift register synchronizing at a rising edge of the clock signal.
latches.
the clock signal should be controlled for data order.
to protect the noise.
CLK
H
X
L
When the "L" level is input to the CLR terminal, all latches are reset and all of parallel conversion
Normally, the CLR terminal should be "H" level.
In the STB terminal is "H" level and the clock signals are inputted to the CLK terminal, the serial data
When the STB terminal is changed to "L" level, the data in the shift register are transferred to the
Even if the STB terminal is "L" level, the input clock signal shifts the data in the shift register, therefore,
Furthermore, the 4 input circuits provide a hysteresis characteristics using the schmitt trigger structure
X: Don’t care
STB
H
X
L
CLR
H
H
L
All of latches are reset (the data in the shift register is no change).
All of parallel conversion outputs are "L".
The data in the shift register is transferred to the latch. And the data in the
latch is output from the parallel conversion output terminals.
When the clock signal is inputted into the CLK terminal in state of the
STB="L" and CLR="H", the data is shifted in the shift register and latched
data is also changed in accordance with the shift register.
The serial data into the DATA terminal are inputted to the shift register.
In this stage, the data in the latch is not changed.
OPERATION
NJU3555
NJU3555
NJU3715
- 3 -

Related parts for NJU3715G