PIC32MX440F512H-80V/MR Microchip Technology, PIC32MX440F512H-80V/MR Datasheet - Page 72
![512 KB Flash, 32 KB RAM, USB-OTG, 80 MHz, 10-Bit ADC, DMA 64 QFN 9x9x0.9mm TUBE](/photos/40/62/406286/landingpagemicrochippic32_sml.jpg)
PIC32MX440F512H-80V/MR
Manufacturer Part Number
PIC32MX440F512H-80V/MR
Description
512 KB Flash, 32 KB RAM, USB-OTG, 80 MHz, 10-Bit ADC, DMA 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet
1.TDGL001.pdf
(214 pages)
Specifications of PIC32MX440F512H-80V/MR
Processor Series
PIC32MX4xx
Core
MIPS
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
512 KB
Data Ram Size
32 KB
Interface Type
USB, I2C, UART, RS-232, RS-485, SPI
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
5
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Package / Case
QFN-64
Operating Temperature Range
- 40 C to + 105 C
Supply Current (max)
10 mA
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Eeprom Size
-
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Lead Free Status / Rohs Status
Details
- Current page: 72 of 214
- Download datasheet (5Mb)
TABLE 4-25:
TABLE 4-26:
Legend:
Note
Legend:
Note
60C0
60D0
60E0
60F0
60C0
60D0
60E0
60F0
1:
1:
PORTD
PORTD
TRISD
TRISD
ODCD
ODCD
LATD
LATD
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See
information.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See
information.
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
PORTD REGISTERS MAP FOR PIC32MX320F128L, PIC32MX340F128L, PIC32MX360F256L, PIC32MX360F512L,
PIC32MX440F128L, PIC32MX460F256L AND PIC32MX460F512L DEVICES ONLY
PORTD REGISTERS MAP FOR PIC32MX320F032H, PIC32MX320F064H, PIC32MX320F128H, PIC32MX340F128H,
PIC32MX340F256H, PIC32MX340F512H, PIC32MX420F032H, PIC32MX440F128H, PIC32MX440F256H AND PIC32MX440F512H
DEVICES ONLY
TRISD15
ODCD15
LATD15
31/15
31/15
RD15
—
—
—
—
—
—
—
—
—
—
—
—
TRISD14
ODCD14
LATD14
30/14
30/14
RD14
—
—
—
—
—
—
—
—
—
—
—
—
(1)
TRISD13
ODCD13
LATD13
29/13
29/13
RD13
—
—
—
—
—
—
—
—
—
—
—
—
TRISD12
ODCD12
LATD12
28/12
RD12
28/12
—
—
—
—
—
—
—
—
—
—
—
—
TRISD11
ODCD11
TRISD11
ODCD11
LATD11
LATD11
27/11
27/11
RD11
RD11
—
—
—
—
—
—
—
—
TRISD10
ODCD10
TRISD10
ODCD10
LATD10
LATD10
26/10
RD10
26/10
RD10
—
—
—
—
—
—
—
—
TRISD9
ODCD9
TRISD9
ODCD9
LATD9
LATD9
25/9
RD9
25/9
RD9
—
—
—
—
—
—
—
—
TRISD8
ODCD8
TRISD8
ODCD8
LATD8
LATD8
24/8
RD8
24/8
RD8
—
—
—
—
—
—
—
—
Bits
Bits
TRISD7
TRISD7
ODCD7
ODCD7
LATD7
LATD7
23/7
23/7
RD7
RD7
—
—
—
—
—
—
—
—
TRISD6
TRISD6
ODCD6
ODCD6
LATD6
LATD6
22/6
22/6
RD6
RD6
—
—
—
—
—
—
—
—
TRISD5
ODCD5
TRISD5
ODCD5
LATD5
LATD5
21/5
21/5
RD5
RD5
—
—
—
—
—
—
—
—
(1)
TRISD4
ODCD4
TRISD4
ODCD4
LATD4
LATD4
20/4
RD4
20/4
RD4
—
—
—
—
—
—
—
—
Section 12.1.1 “CLR, SET and INV Registers”
Section 12.1.1 “CLR, SET and INV Registers”
TRISD3
ODCD3
TRISD3
ODCD3
LATD3
LATD3
19/3
RD3
19/3
RD3
—
—
—
—
—
—
—
—
TRISD2
ODCD2
TRISD2
ODCD2
LATD2
LATD2
18/2
RD2
18/2
RD2
—
—
—
—
—
—
—
—
TRISD1
ODCD1
TRISD1
ODCD1
LATD1
LATD1
17/1
RD1
17/1
RD1
—
—
—
—
—
—
—
—
TRISD0
TRISD0
ODCD0
ODCD0
LATD0
LATD0
16/0
16/0
RD0
RD0
—
—
—
—
—
—
—
—
for more
for more
0000
FFFF
0000
xxxx
0000
xxxx
0000
0000
0000
0FFF
0000
xxxx
0000
xxxx
0000
0000
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