SAF1760BE/V1,557 NXP Semiconductors, SAF1760BE/V1,557 Datasheet - Page 26
SAF1760BE/V1,557
Manufacturer Part Number
SAF1760BE/V1,557
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SAF1760BEV1557.pdf
(110 pages)
Specifications of SAF1760BE/V1,557
Lead Free Status / Rohs Status
Compliant
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SAF1760_1
Product data sheet
7.8.1 Hybrid mode
Table 6
Table 6.
In hybrid mode (see
transistor, controlled using one of the GPIO pins of the processor. This helps to reduce the
suspend current, I
V
back on, before the resume programming sequence starts.
Table 7
Table 7.
Voltage
V
V
Pins
DATA[31:0], A[17:1], TEST1, TEST2, TEST3,
TEST4, TEST5, TEST6, TEST7, DREQ,
DACK, IRQ, SUSPEND/WAKEUP_N
CS_N, RESET_N, RD_N, WR_N
Fig 9.
CC(5V0)
CC(5V0)
CC(I/O)
(1) Each supply voltage pin must be connected to a 100 nF decoupling capacitor
(2) A 4.7 F to 10 F electrolytic or tantalum capacitor is required on any one of the pins 5, 50 or 118.
shows the description of hybrid mode.
shows the status of output pins in hybrid mode.
is off during suspend, a 3 ms reset pulse is required when power is switched
All the electrolytic or tantalum capacitors must be of low ESR type (0.2
Hybrid mode
Hybrid mode
Pin status in hybrid mode
CC(I/O)
Figure
Rev. 01 — 9 November 2009
, below 100 A. If the SAF1760 is used in hybrid mode and
SAF1760BE
10, 40, 48,
59, 67, 75,
5, 50, 118
9), V
104, 115
83, 94,
6, 7
CC(5V0)
85
9
V
V
REG1V8
REG1V8
REG3V3
CC(5V0)
CC(I/O)
10 F
can be switched off using an external PMOS
controlled by the CPU
V
on
on
off
on
off
(1), (2)
CC(I/O)
Embedded Hi-Speed USB host controller
10 F
Status
off
on
100 nF
(1)
100 nF
001aai636
100 nF
(1)
1.65 V to 3.6 V
100 nF
3.3 V to 5 V
V
on
off
X
X
X
CC(5V0)
100 nF
to 2 ).
SAF1760
© NXP B.V. 2009. All rights reserved.
Status
normal
high-Z
undefined
input
undefined
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