ICS1893CFLF IDT, Integrated Device Technology Inc, ICS1893CFLF Datasheet - Page 112
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ICS1893CFLF
Manufacturer Part Number
ICS1893CFLF
Description
PHYCEIVER LOW PWR 3.3V 48-SSOP
Manufacturer
IDT, Integrated Device Technology Inc
Series
PHYceiver™r
Type
PHY Transceiverr
Datasheet
1.ICS1893CFLFT.pdf
(127 pages)
Specifications of ICS1893CFLF
Protocol
MII
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
48-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
1893CFLF
800-1021
800-1021
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9.5.10 100M / MII Media Independent Interface: Transmit Latency
ICS1893CF, Rev. K, 05/13/10
TXEN
TXCLK
TXD
TP_TX
Table 9-17
periods consist of timings of signals on the following pins:
•
•
•
•
Figure 9-11
Table 9-17. MII / 100M Stream Interface Transmit Latency
† The IEEE maximum is 18 bit times.
Figure 9-11. MII / 100M Stream Interface Transmit Latency Timing Diagram
Period
Time
†
unscrambled.
TXEN
TXCLK
TXD (that is, TXD[3:0])
TP_TX (that is, TP_TXP and TP_TXN)
t1
Shown
†
ICS1893CF Data Sheet - Release
TXEN Sampled to MDI Output of First
Bit of /J/ †
lists the significant time periods for the MII / 100 Stream Interface transmit latency. The time
shows the timing diagram for the time periods.
Preamble /J/
Parameter
Copyright © 2009, Integrated Device Technology, Inc.
Preamble /K/
All rights reserved.
t1
112
MII mode
Conditions
Chapter 9 DC and AC Operating Conditions
Min.
–
Typ. Max.
2.8
3
Bit times
May, 2010
Units