ICS1893CFLF IDT, Integrated Device Technology Inc, ICS1893CFLF Datasheet - Page 109
![PHYCEIVER LOW PWR 3.3V 48-SSOP](/photos/6/88/68806/ics1893cflf_sml.jpg)
ICS1893CFLF
Manufacturer Part Number
ICS1893CFLF
Description
PHYCEIVER LOW PWR 3.3V 48-SSOP
Manufacturer
IDT, Integrated Device Technology Inc
Series
PHYceiver™r
Type
PHY Transceiverr
Datasheet
1.ICS1893CFLFT.pdf
(127 pages)
Specifications of ICS1893CFLF
Protocol
MII
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
48-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
1893CFLF
800-1021
800-1021
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ICS1893CFLF
Manufacturer:
IDT
Quantity:
420
Company:
Part Number:
ICS1893CFLF
Manufacturer:
HARVATEK
Quantity:
456
Part Number:
ICS1893CFLF
Manufacturer:
ICS
Quantity:
20 000
Part Number:
ICS1893CFLFT
Manufacturer:
IDT
Quantity:
20 000
9.5.7 MII Management Interface Timing
ICS1893CF, Rev. K, 05/13/10
Table 9-14
timings of signals on the MDC and MDIO pins).
Table 9-14. MII Management Interface Timing
† The ICS1893CF is tested at 25 MHz (a 40-ns period) with a 50-pF load. Designs must account for all board loading
Figure 9-8. MII Management Interface Timing Diagram
MDC
MDIO
(Output)
MDC
MDIO
(Input)
Period
of MDC.
Time
t1
t2
t3
t4
t5
t6
ICS1893CF Data Sheet Rev. J - Release
MDC Minimum High Time
MDC Minimum Low Time
MDC Period
MDC Rise Time to MDIO Valid
MDIO Setup Time to MDC
MDIO Hold Time after MDC
lists the significant time periods for the MII Management Interface timing (which consists of
t1
Parameter
Copyright © 2009, Integrated Device Technology, Inc.
t3
t2
t5
t4
t6
All rights reserved.
109
Figure 9-8
shows the timing diagram for the time periods.
Conditions
Chapter 9 DC and AC Operating Conditions
–
–
–
–
–
–
400†
Min.
160
160
10
10
0
Typ.
–
–
†
–
–
–
Max.
300
–
–
–
–
–
May, 2010
Units
ns
ns
ns
ns
ns
ns