ICS1893CY-10LFT IDT, Integrated Device Technology Inc, ICS1893CY-10LFT Datasheet - Page 3
ICS1893CY-10LFT
Manufacturer Part Number
ICS1893CY-10LFT
Description
PHYCEIVER LOW PWR 3.3V 64-TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
PHYceiver™r
Type
PHY Transceiverr
Datasheet
1.ICS1893CY-10LFT.pdf
(143 pages)
Specifications of ICS1893CY-10LFT
Protocol
MII
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Other names
1893CY-10LFT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ICS1893CY-10LFT
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
ICS1893CY-10 Rev 1/07
Section
6.3
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
6.3.6
6.4
6.4.1
6.4.2
6.4.3
6.4.4
6.4.5
6.4.6
6.5
6.5.1
6.5.2
6.5.3
6.5.4
6.5.5
6.5.6
6.5.7
6.5.8
6.5.9
6.5.10
6.5.11
6.5.12
6.5.13
6.5.14
6.6
6.6.1
6.6.2
ICS1893CY-10 - Release
Functional Block: 100Base-X PCS and PMA Sublayers ........................................42
PCS Sublayer ........................................................................................................42
PMA Sublayer ........................................................................................................43
PCS/PMA Transmit Modules .................................................................................43
PCS/PMA Receive Modules ..................................................................................44
PCS Control Signal Generation .............................................................................45
4B/5B Encoding/Decoding .....................................................................................45
Functional Block: 100Base-TX TP-PMD Operations .............................................46
100Base-TX Operation: Stream Cipher Scrambler/Descrambler ..........................46
100Base-TX Operation: MLT-3 Encoder/Decoder .................................................46
100Base-TX Operation: DC Restoration ................................................................46
100Base-TX Operation: Adaptive Equalizer ..........................................................47
100Base-TX Operation: Twisted-Pair Transmitter .................................................47
100Base-TX Operation: Twisted-Pair Receiver .....................................................47
Functional Block: 10Base-T Operations ................................................................48
10Base-T Operation: Manchester Encoder/Decoder .............................................48
10Base-T Operation: Clock Synthesis ...................................................................48
10Base-T Operation: Clock Recovery ...................................................................49
10Base-T Operation: Idle .......................................................................................49
10Base-T Operation: Link Monitor .........................................................................49
10Base-T Operation: Smart Squelch .....................................................................50
10Base-T Operation: Carrier Detection .................................................................50
10Base-T Operation: Collision Detection ...............................................................51
10Base-T Operation: Jabber ..................................................................................51
10Base-T Operation: SQE Test .............................................................................51
10Base-T Operation: Twisted-Pair Transmitter .....................................................52
10Base-T Operation: Twisted-Pair Receiver .........................................................52
10Base-T Operation: Auto Polarity Correction .......................................................52
10Base-T Operation: Isolation Transformer ...........................................................52
Functional Block: Management Interface ...............................................................53
Management Register Set Summary .....................................................................53
Management Frame Structure ...............................................................................53
Copyright © 2007, Integrated Device Technology, Inc.
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