ISP1161ABM-T ST-Ericsson Inc, ISP1161ABM-T Datasheet - Page 108
ISP1161ABM-T
Manufacturer Part Number
ISP1161ABM-T
Description
IC USB HOST CTRL FULL-SPD 64LQFP
Manufacturer
ST-Ericsson Inc
Datasheet
1.ISP1161ABD.pdf
(135 pages)
Specifications of ISP1161ABM-T
Controller Type
USB 2.0 Controller
Interface
Parallel
Voltage - Supply
3.3V, 5V
Current - Supply
47mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
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Part Number:
ISP1161ABM-T
Manufacturer:
ST-Ericsson Inc
Quantity:
10 000
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Philips Semiconductors
Table 108: DcInterrupt register: bit allocation
9397 750 13962
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
BUSTATUS
EP14
EP6
31
23
15
R
R
R
R
0
0
0
7
0
SP_EOT
Table 109: DcInterrupt register: bit description
Bit
31 to 24
23 to 10
9
8
7
6
5
4
3
2
1
0
EP13
EP5
30
22
14
R
R
R
R
0
0
0
6
0
Symbol
-
EP14 to EP1
EP0IN
EP0OUT
BUSTATUS
SP_EOT
PSOF
SOF
EOT
SUSPND
RESUME
RESET
PSOF
EP12
EP4
29
21
13
R
R
R
R
0
0
0
5
0
Rev. 03 — 23 December 2004
EP11
Description
reserved
Logic 1 indicates the interrupt source(s): endpoint 14 to 1.
Logic 1 indicates the interrupt source: control IN endpoint.
Logic 1 indicates the interrupt source: control OUT endpoint.
Monitors the current USB bus status (0 = awake, 1 = suspend).
Logic 1 indicates that an EOT interrupt has occurred for a short
packet.
Logic 1 indicates that an interrupt is issued every 1 ms because
of the Pseudo SOF; after 3 missed SOFs ‘suspend’ state is
entered.
Logic 1 indicates that a SOF condition was detected.
Logic 1 indicates that an internal EOT condition was generated
by the DMA Counter reaching zero.
Logic 1 indicates that an ‘awake’ to ‘suspend’ change of state
was detected on the USB bus.
Logic 1 indicates that a ‘resume’ state was detected.
Logic 1 indicates that a bus reset condition was detected.
SOF
Full-speed USB single-chip host and device controller
EP3
28
20
12
R
R
R
R
0
0
0
4
0
reserved
EP10
EOT
EP2
27
19
11
R
R
R
R
0
0
0
3
0
SUSPND
EP9
EP1
26
18
10
R
R
R
R
0
0
0
2
0
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
RESUME
EP0IN
ISP1161A
EP8
25
17
R
R
R
R
0
0
9
0
1
0
EP0OUT
RESET
107 of 134
EP7
24
16
R
R
R
R
0
0
8
0
0
0
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