Z16C3510VSG Zilog, Z16C3510VSG Datasheet - Page 133
Z16C3510VSG
Manufacturer Part Number
Z16C3510VSG
Description
IC 10MHZ Z8500 CMOS ISCC 68-PLCC
Manufacturer
Zilog
Series
IUSC™r
Specifications of Z16C3510VSG
Controller Type
Serial Communications Controller (SCC)
Interface
USB
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
50mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
68-LCC (J-Lead)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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UM011001-0601
The SCC uses /INTACK (Interrupt Acknowledge) for
recognition of an interrupt acknowledge cycle. This pin,
used with /RD, allows the SCC to gate its interrupt vector
onto the data bus. An active /RD signal during an interrupt
acknowledge cycle performs two functions. First, it allows
Interrupt Condition
Active
Set
INT
IP
IEI High?
/INTACK * IEI * /RD
Wait For CPU
/INTACK Cycle
Figure 12. SCC Interrupt Status Diagram
the highest priority device requesting an interrupt to place
its vector on the data bus. Secondly, it sets the IUS bit in
the highest priority device to show the device is now under
service.
Return To Main Program
Cleared
Cleared
IUS
IUS
Set
IP
The Z180™ Interfaced with the SCC at MHZ
CPU Read, Write, or Reset
IEO High?
Application Note
7-13
7
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