ISP1583BSGA ST-Ericsson Inc, ISP1583BSGA Datasheet - Page 12

• Manufacturer Part Number: ISP1583BSGA
• Description: IC USB CTRL HI-SPEED 64HVQFN
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1583BSGA

• Controller Type: USB Peripheral Controller
• Interface: Parallel/Serial
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 47mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ISP1583BS-S; ISP1583BS-S

NXP Semiconductors
Table 3.
[1]
[2]
[3]
[4]
[5]
ISP1583_7
Product data sheet
Symbol
BUS_
CONF/
DA0
WAKEUP
SUSPEND 64
DGND
DGND
Symbol names ending with underscore N, for example, NAME_N, represent active LOW signals.
All outputs and I/O pins can source 4 mA, unless otherwise specified.
Control signals are not 3-stated.
Add a decoupling capacitor (0.1 F) to all the supply pins. For better EMI results, add a 0.01 F capacitor in parallel to 0.1 F.
The DMA bus is in 3-state until a DMA command (see
[3]
[1]
Pin description
Pin
62
63
-
exposed die
pad
ISP1583BS ISP1583ET;
ISP1583ET2
B2
A2
C2
B9
J9
…continued
ISP1583ET1
A3
B2
A2
-
B8, G7
Rev. 07 — 22 September 2008
Section
Type
I/O
I
O
-
-
9.4.1) is executed.
[2]
Description
Bus configuration input — Selects bus mode during
power-up:
Address selection output — Selects the Task File
register of an ATA/ATAPI device at normal operation; see
Table 61
bidirectional pad; 10 ns slew-rate control; TTL; 5 V tolerant
wake-up input; when this pin is at the HIGH level, the chip
is prevented from going into the suspend state and
wake-up the chip when already in suspend mode; when
not in use, connect this pin to ground through a 10 k
resistor
When the RESET_N pin is LOW, ensure that the WAKEUP
pin does not go from LOW to HIGH; otherwise the device
will enter test mode.
input pad; TTL; 5 V tolerant
suspend state indicator output; used as a power switch
control output to power-off or power-on external devices
when going into suspend mode or recovering from
suspend mode
CMOS output; 8 mA drive
digital ground
ground supply; down bonded to the exposed die pad (heat
sink); to be connected to DGND during the PCB layout
•
•
LOW: split bus mode; multiplexed 8-bit address and
data bus on AD[7:0], separate DMA data bus
DATA[15:0]
HIGH (connect to V
separate 8-bit address on AD[7:0], 16-bit processor
data bus on DATA[15:0]; DMA is multiplexed on
processor bus DATA[15:0]
[5]
Hi-Speed USB peripheral controller
CC(I/O)
): generic processor mode;
© NXP B.V. 2008. All rights reserved.
ISP1583
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