IDTSTAC9220X5TAEA6XR IDT, Integrated Device Technology Inc, IDTSTAC9220X5TAEA6XR Datasheet - Page 44
IDTSTAC9220X5TAEA6XR
Manufacturer Part Number
IDTSTAC9220X5TAEA6XR
Description
IC AUDIO CODEC 8CH HD 5V 48-QFP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Audio Codec, HDr
Datasheet
1.IDTSTAC9220X3TAEA6XR.pdf
(161 pages)
Specifications of IDTSTAC9220X5TAEA6XR
Resolution (bits)
24 b
Number Of Adcs / Dacs
2 / 4
Sigma Delta
Yes
S/n Ratio, Adcs / Dacs (db) Typ
93 / 95
Dynamic Range, Adcs / Dacs (db) Typ
90 / 100
Voltage - Supply, Analog
3.14 V ~ 3.47 V; 3.8 V ~ 4.2 V; 4.75 V ~ 5.25 V
Voltage - Supply, Digital
3.14 V ~ 3.47 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
STAC9220X5TAEA6XR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
IDTSTAC9220X5TAEA6XR
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
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IDT™
8-CHANNEL HIGH DEFINITION AUDIO CODEC
STAC9220
8-CHANNEL HIGH DEFINITION AUDIO CODEC
6.4.15. AFG GPIOEn
[31:4]
Bit
[1]
[0]
Bit
[3]
[2]
[1]
[0]
Set1
Get
Bitfield Name
Bitfield Name
Data1
Data0
Mask3
Mask2
Mask1
Mask0
Rsvd
Table 41. AFG GPIOEn Command Response Format
Table 39. AFG GPIO Command Response Format
Table 40. AFG GPIOEn Command Verb Format
Verb ID
F16
716
RW
RW
RW
RW
RW
RW
RW
RW
R
44
Reset
See bits [7:0] of bitfield table
0x0
0x0
Reset
0x0
0x0
0x0
0x0
0x0
Payload
Data for GPIO1 (Pin 46). If this GPIO bit is
configured as Sticky (edge-sensitive) input, it can
be cleared by writing zero (one) here when the
corresponding Polarity Control bit is zero (one).
Data for GPIO0 (Pin 45). If this GPIO bit is
configured as Sticky (edge-sensitive) input, it can
be cleared by writing zero (one) here when the
corresponding Polarity Control bit is zero (one).
00
Reserved
Enable for GPIO3:
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
Enable for GPIO2:
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
Enable for GPIO1:
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
Enable for GPIO0:
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
STAC9220
Description
Description
See bitfield table
0000_0000h
Response
PC AUDIO
V1.0 01/08
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