ADAU1328BSTZ Analog Devices Inc, ADAU1328BSTZ Datasheet - Page 9

• Manufacturer Part Number: ADAU1328BSTZ
• Description: IC CODEC 24BIT 2ADC/8DAC 48LQFP
• Manufacturer: Analog Devices Inc
• Type: General Purposer

Specifications of ADAU1328BSTZ

• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 8
• Sigma Delta: Yes
• S/n Ratio, Adcs / Dacs (db) Typ: 94 / 94
• Dynamic Range, Adcs / Dacs (db) Typ: 105 / 106
• Voltage - Supply, Analog: 3 V ~ 3.6 V
• Voltage - Supply, Digital: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Audio Codec Type: Stereo
• No. Of Adcs: 2
• No. Of Dacs: 8
• No. Of Input Channels: 2
• No. Of Output Channels: 8
• Adc / Dac Resolution: 24bit
• Adcs / Dacs Signal To Noise Ratio: 108dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 9. Pin Function Description
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
In/Out
I
I
O
I
I
O
O
O
O
I
I/O
I
I
I/O
I/O
I
I/O
I/O
I/O
O
I/O
I/O
I
I/O
I
Mnemonic
AGND
MCLKI/XI
MCLKO/XO
AGND
AVDD
OL3
OR3
OL4
OR4
PD/RST
DSDATA4
DGND
DVDD
DSDATA3
DSDATA2
DSDATA1
DBCLK
DLRCLK
ASDATA2
ASDATA1
ABCLK
ALRCLK
CIN/ADR0
COUT/SDA
DGND
MCLKO/XO
DSDATA4
MCLKI/XI
PD/RST
AGND
AGND
DGND
AVDD
OR3
OR4
OL3
OL4
Analog Ground.
Master Clock Input/Crystal Oscillator Input.
Analog Ground.
Analog Power Supply. Connect to analog 3.3 V supply.
Digital Ground.
Digital Power Supply. Connect to digital 3.3 V supply.
LR Clock for DACs.
LR Clock for ADCs.
Digital Ground.
Description
Master Clock Output/Crystal Oscillator Output.
DAC 3 Left Output.
DAC 3 Right Output.
DAC 4 Left Output.
DAC 4 Right Output.
Power-Down Reset (Active Low).
DAC Input 4 (Input to DAC 4 L and R)/DAC TDM Data Out 2/AUX ADC 1 Data In.
DAC Input 3 (Input to DAC 3 L and R)/DAC TDM Data In 2/AUX DAC 2 Data Output.
DAC Input 2 (Input to DAC 2 L and R)/DAC TDM Data Out 1/AUX ADC 1 Data In.
DAC Input 1 (Input to DAC 1 L and R)/DAC TDM Data In 1/AUX ADC 2 Data In.
Bit Clock for DACs.
ADC Serial Data Output 2 (ADC 2 L and R)/ADC TDM Data Input/AUX DAC 1 Data Output.
ADC Serial Data Output 1 (ADC 1 L and R)/ADC TDM Data Output.
Bit Clock for ADCs.
Control Data Input (SPI).
Control Data Output (SPI).
10
11
12
1
2
3
4
5
6
7
8
9
48
13
47
14
46
15
Figure 2. Pin Configuration
45
16
SINGLE-ENDED
Rev. 0 | Page 9 of 32
44
17
ADAU1328
(Not to Scale)
TOP VIEW
OUTPUT
43
18
42
19
41
20
40
21
39
22
38
23
37
24
36
35
34
33
32
31
30
29
28
27
26
25
AGND
FILTR
AGND
AVDD
AGND
OR2
OL2
OR1
OL1
CLATCH/ADR1
CCLK/SCL
DGND
ADAU1328