ATF16LV8C-10XC Atmel, ATF16LV8C-10XC Datasheet - Page 5
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ATF16LV8C-10XC
Manufacturer Part Number
ATF16LV8C-10XC
Description
IC PLD 10NS 20TSSOP
Manufacturer
Atmel
Datasheet
1.ATF16LV8C-10SC.pdf
(15 pages)
Specifications of ATF16LV8C-10XC
Programmable Type
EE PLD
Number Of Macrocells
8
Voltage - Input
3 ~ 5.5V
Speed
10ns
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
ATF16LV8C10XC
Input Test Waveforms and
Measurement Levels:
t
Pin Capacitance
(f = 1 MHz, T = 25°C)
Note:
Power-up Reset
The ATF16LV8C’s registers are designed to reset during
power-up. At a point delayed slightly from V
V
the registered output state will always be high on power-up.
This feature is critical for state machine initialization.
However, due to the asynchronous nature of reset and the
uncertainty of how V
following conditions are required:
1. The V
2. The signals from which the clock is derived must
3. After T
R
C
C
RST
, t
IN
OUT
F
remain stable during T
be met before driving the clock term high.
, all registers will be reset to the low state. As a result,
< 1.5ns (10% to 90%)
1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
CC
PR
rise must be monotonic from below 0.7V.
, all input and feedback setup times must
(1)
CC
actually rises in the system, the
PR
.
Typ
5
6
CC
crossing
Max
8
8
Output Test Loads:
Commercial
Note:
Parameter
T
V
PR
RST
Similar devices are tested with slightly different loads.
These load differences may affect output signals’ delay
and slew rate. Atmel devices are tested with sufficient
margins to meet compatible devices.
R1 = 316
R2 = 348
Description
Power-up
Reset Time
Power-up
Reset
Voltage
Units
pF
pF
3.3V
Typ
600
2.5
CL = 35 pF
OUTPUT
PIN
Conditions
V
V
OUT
1,000
Max
IN
3.0
= 0V
= 0V
Units
ns
V
5