MC68EC000EI16 Freescale Semiconductor, MC68EC000EI16 Datasheet - Page 66
MC68EC000EI16
Manufacturer Part Number
MC68EC000EI16
Description
IC MPU 32BIT 16MHZ 68-PLCC
Manufacturer
Freescale Semiconductor
Specifications of MC68EC000EI16
Processor Type
M680x0 32-Bit
Speed
16MHz
Voltage
3.3V, 5V
Mounting Type
Surface Mount
Package / Case
68-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
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2.5.2 Memory Indirect Modes
Memory indirect modes fetch two operands from memory. The BR and bd evaluate the
address of the first operand, intermediate memory pointer (IMP). The value of IMP and the
od evaluates the address of the second operand.
There are three types of memory indirect modes: pre-index, post-index, and index register
suppressed. Xn and its modifiers can be allocated to determine either the address of the IMP
(pre-index) or to the address of the second operand (post-index).
2.5.2.1 MEMORY INDIRECT WITH PREINDEX. The Xn is allocated to determine the
address of the IMP. Figure 2-6 illustrates the memory indirect with pre-indexing mode.
NOTE: S indicates suppressed and A indicates active.
MOTOROLA
BR
PC
PC
PC
PC
An
An
An
An
S
S
S
S
Xn
A
A
A
A
A
A
A
A
A
A
A
A
bd
S
S
A
A
S
S
A
A
S
S
A
A
od
S
A
S
A
S
A
S
A
S
A
S
A
M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL
Register Indirect
Register Indirect
Register Indirect with Constant Index
Register Indirect with Constant Index
Address Register Indirect with
Variable Index
Address Register Indirect with
Variable Index
Address Register Indirect with
Constant and Variable Index
Address Register Indirect with
Constant and Variable Index
PC Relative with Variable Index
PC Relative with Variable Index
PC Relative with Constant and
Variable Index
PC Relative with Constant and
Variable Index
IMP Addressing Mode
Memory Pointer Directly to Data Operand
Memory Pointer as Base with Displacement
to Data Operand
Memory Pointer Directly to Data Operand
Memory Pointer as Base with Displacement
to Data Operand
Memory Pointer Directly to Data Operand
Memory Pointer as Base with Displacement
to Data Operand
Memory Pointer Directly to Data Operand
Memory Pointer as Base with Displacement
to Data Operand
Memory Pointer Directly to Data Operand
Memory Pointer as Base with Displacement
to Data Operand
Memory Pointer Directly to Data Operand
Memory Pointer as Base with Displacement
to Data Operand
Operand Addressing Mode
Addressing Capabilities
2-25
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