MC68EC000EI16 Freescale Semiconductor, MC68EC000EI16 Datasheet - Page 125

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MC68EC000EI16

Manufacturer Part Number
MC68EC000EI16
Description
IC MPU 32BIT 16MHZ 68-PLCC
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MC68EC000EI16

Processor Type
M680x0 32-Bit
Speed
16MHz
Voltage
3.3V, 5V
Mounting Type
Surface Mount
Package / Case
68-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

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ASL, ASR
Operation:
Assembler
Syntax:
Attributes:
Description: Arithmetically shifts the bits of the operand in the direction (L or R) specified.
MOTOROLA
The carry bit receives the last bit shifted out of the operand. The shift count for the
shifting of a register may be specified in two different ways:
The size of the operation can be specified as byte, word, or long. An operand in mem-
ory can be shifted one bit only, and the operand size is restricted to a word.
For ASL, the operand is shifted left; the number of positions shifted is the shift count.
Bits shifted out of the high-order bit go to both the carry and the extend bits; zeros are
shifted into the low-order bit. The overflow bit indicates if any sign changes occur dur-
ing the shift.
1. Immediate—The shift count is specified in the instruction (shift range, 1 – 8).
2. Register—The shift count is the value in the data register specified in instruction
modulo 64.
ASL:
M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL
Destination Shifted By Count
ASd Dx,Dy
ASd # < data > ,Dy
ASd < ea >
where d is direction, L or R
Size = (Byte, Word, Long)
C
X
Arithmetic Shift
(M68000 Family)
.
Destination
OPERAND
ASL, ASR
Integer Instructions
O
4-21

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