PNX1502E/G,557 NXP Semiconductors, PNX1502E/G,557 Datasheet - Page 599
PNX1502E/G,557
Manufacturer Part Number
PNX1502E/G,557
Description
IC MEDIA PROC 300MHZ 456-BGA
Manufacturer
NXP Semiconductors
Specifications of PNX1502E/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.23 V ~ 1.37 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Ram Size
-
Lead Free Status / Rohs Status
Compliant
Other names
568-1298
935277748557
PNX1502E/G
935277748557
PNX1502E/G
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Volume 1 of 1
Table 8: Memory Based Scaler (MBS) Registers
PNX15XX_SER_3
Product data sheet
Bit
28:24
23:21
20:16
15:13
12:8
7:5
4:0
Video Input Address Generation Control Registers
Offset 0x10 C140
31:28
27: 3
2:0
Offset 0x10 C144
31:15
14: 3
2:0
Offset 0x10 C148
31:28
27: 3
2:0
Offset 0x10 C14C
31:15
14: 3
2:0
Offset 0x10 C150
31:28
27: 3
Symbol
PFU_OFFS_C4 [4:0]
PFU_SIZE_C3 [2:0]
PFU_OFFS_C3 [4:0]
PFU_SIZE_C2[2:0]
PFU_OFFS_C2[4:0]
PFU_SIZE_C1[2:0]
PFU_OFFS_C1[4:0]
Unused
PFU_BASE1
PFU_OFFSET1
Unused
PFU_PITCH1
Unused
Unused
PFU_BASE2
PFU_OFFSET2
Unused
PFU_PITCH2
Unused
Unused
PFU_BASE3
Source Base Address #1
Source Line Pitch #1
Source Base Address #2
Source Line Pitch #2
Source Base Address #3
Acces
s
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
-
-
0
-
-
-
-
-
Value
Rev. 3 — 17 March 2006
…Continued
Description
Offset component #4 (alpha or V)
Index of MSB position within 32 bit word (0-31)
Size component #3 (V or B or Y2)
number of bits minus 1 (e.g. 7 = 8 bits per component)
Offset component #3 (V or B or Y2)
index of MSB position within 32 bit word (0-31)
Size component #2 (U or G)
number of bits minus 1 (e.g. 7 = 8 bits per component)
Offset component #2 (U or G)
index of MSB position within 32 bit word (0-31)
Size component #1 (Y or R)
number of bits minus 1 (e.g. 7 = 8 bits per component)
Offset component #1 (Y or R)
index of MSB position within 32 bit word (0-31)
Base address DMA #1
used depending on PFU_BAMODE setting
Base address byte offset DMA #1
bits define pixel offset within multi pixel 64 bit words
(e.g. a 16bit pixel can be placed on any 16 bit boundary)
Line pitch DMA #1, signed value (two’s complement)
Used for all packed formats and for plane 1.
Base address DMA #2
Used depending on PFU_BAMODE setting.
Base address byte offset DMA #2
Bits define pixel offset within multi pixel 64-bit words (e.g., a 16-bit
pixel can be placed on any 16-bit boundary).
Line pitch DMA #2, signed value (two’s complement)
Used for planes 2 and 3.
Base address DMA #3
Used depending on PFU_BAMODE setting.
Chapter 19: Memory Based Scaler
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX15xx Series
19-20
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