XC4VLX100-10FFG1513C Xilinx Inc, XC4VLX100-10FFG1513C Datasheet - Page 40
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XC4VLX100-10FFG1513C
Manufacturer Part Number
XC4VLX100-10FFG1513C
Description
IC FPGA VIRTEX-4 100K 1513-FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-4r
Specifications of XC4VLX100-10FFG1513C
Number Of Logic Elements/cells
110592
Number Of Labs/clbs
12288
Total Ram Bits
4423680
Number Of I /o
960
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1513-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
122-1487
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC4VLX100-10FFG1513C
Manufacturer:
Xilinx Inc
Quantity:
10 000
Table 47: Input Clock Tolerances
DS302 (v3.7) September 9, 2009
Product Specification
Notes:
1.
2.
3.
4.
5.
6.
Duty Cycle Input Tolerance (in %)
Input Clock Cycle-Cycle Jitter (Low Frequency Mode)
Input Clock Cycle-Cycle Jitter (High Frequency Mode)
Input Clock Period Jitter (Low Frequency Mode)
Input Clock Period Jitter (High Frequency Mode)
Feedback Clock Path Delay Variation
CLKIN_PSCLK_PULSE_RANGE_1
CLKIN_PSCLK_PULSE_RANGE_1_50
CLKIN_PSCLK_PULSE_RANGE_50_100
CLKIN_PSCLK_PULSE_RANGE_100_200
CLKIN_PSCLK_PULSE_RANGE_200_400
CLKIN_PSCLK_PULSE_RANGE_400
CLKIN_CYC_JITT_DLL_LF
CLKIN_CYC_JITT_FX_LF
CLKIN_CYC_JITT_DLL_HF
CLKIN_CYC_JITT_FX_HF
CLKIN_PER_JITT_DLL_LF
CLKIN_PER_JITT_FX_LF
CLKIN_PER_JITT_DLL_HF
CLKIN_PER_JITT_FX_HF
CLKFB_DELAY_VAR_EXT
For boundary frequencies, use the more restrictive specifications.
DLL Outputs are used in these instances to describe the outputs: CLK0, CLK90, CLK180, CLK270, CLK2X, CLK2X180, and CLKDV.
DFS Outputs are used in these instances to describe the outputs: CLKFX and CLKFX180.
If both DLL and DFS outputs are used, follow the more restrictive specifications.
The DCM must be reset if the clock input clock stops for more than 100 ms.
These values also apply when using both DLL and DFS outputs.
Symbol
PSCLK only
PSCLK and CLKIN
CLKIN (using DLL outputs)
CLKIN (using DFS outputs)
CLKIN (using DLL outputs)
CLKIN (using DFS outputs)
CLKIN (using DLL outputs)
CLKIN (using DFS outputs)
CLKIN (using DLL outputs)
CLKIN (using DFS outputs)
CLKFB off-chip feedback
www.xilinx.com
Virtex-4 FPGA Data Sheet: DC and Switching Characteristics
Description
(2,5,6)
(2,5,6)
(2,5,6)
(2,5,6)
(3)
(3)
(3)
(3)
100 – 200 MHz
200 – 400 MHz
50 – 100 MHz
±300
±300
±150
±150
±1.0
±1.0
±1.0
±1.0
±1.0
1 – 50 MHz
-12
Frequency
> 400 MHz
< 1 MHz
Range
Speed Grade
±300
±300
±150
±150
±1.0
±1.0
±1.0
±1.0
±1.0
-11
(1)
(1)
(1)
(1)
25 - 75
25 - 75
30 - 70
40 - 60
45 - 55
45 - 55
Value
±1.15
±1.15
±1.15
±1.15
±1.15
±345
±345
±173
±173
-10
Units
ps
ps
ps
ps
ns
ns
ns
ns
ns
%
%
%
%
%
%
40